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PDF MMDFS2P102 Data sheet ( Hoja de datos )
| Número de pieza | MMDFS2P102 | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MMDFS2P102
Power MOSFET
2 Amps, 20 Volts
P−Channel SO−8, FETKYt
The FETKY product family incorporates low RDS(on), true logic
level MOSFETs packaged with industry leading, low forward drop,
low leakage Schottky Barrier rectifiers to offer high efficiency
components in a space saving configuration. Independent pinouts for
MOSFET and Schottky die allow the flexibility to use a single
component for switching and rectification functions in a wide variety
of applications such as Buck Converter, Buck−Boost, Synchronous
Rectification, Low Voltage Motor Control, and Load Management in
Battery Packs, Chargers, Cell Phones and other Portable Products.
• Power MOSFET with Low VF, Low IR Schottky Rectifier
• Lower Component Placement and Inventory Costs along with
Board Space Savings
• Logic Level Gate Drive − Can be Driven by Logic ICs
• Mounting Information for SO−8 Package Provided
• IDSS Specified at Elevated Temperature
• Applications Information Provided
MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
(Note 1.)
Rating
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 1.0 MW)
Gate−to−Source Voltage − Continuous
Drain Current (Note 3.)
− Continuous @ TA = 25°C
− Continuous @ TA = 100°C
− Single Pulse (tp v 10 ms)
Total Power Dissipation @ TA = 25°C
(Note 2.)
Symbol
VDSS
VDGR
VGS
Value
20
20
"20
Unit
Vdc
Vdc
Vdc
ID 3.3 Adc
ID 2.1
IDM 20 Apk
PD 2.0 Watts
Single Pulse Drain−to−Source Avalanche
Energy − STARTING TJ = 25°C
VDD = 30 Vdc, VGS = 5.0 Vdc, VDS = 20
Vdc, IL = 9.0 Apk, L = 10 mH, RG = 25 W
EAS
324 mJ
1. Negative sign for P−channel device omitted for clarity.
2. Pulse Test: Pulse Width ≤ 250 μs, Duty Cycle ≤ 2.0%.
3. Mounted on 2″ square FR4 board (1″ sq. 2 oz. Cu 0.06″ thick single sided),
10 sec. max.
http://onsemi.com
2 AMPERES
20 VOLTS
RDS(on) = 160 mW
VF = 0.39 Volts
P−Channel
D
G
S
MARKING
DIAGRAM
SO−8
8 CASE 751
STYLE 18
1
2P102
LYWW
L = Location Code
Y = Year
WW = Work Week
PIN ASSIGNMENT
Anode
Anode
Source
Gate
18
27
36
45
Top View
Cathode
Cathode
Drain
Drain
ORDERING INFORMATION
Device
Package
Shipping
MMDFS2P102R2 SO−8 2500 Tape & Reel
© Semiconductor Components Industries, LLC, 2006
August, 2006 − Rev. 2
1
Publication Order Number:
MMDFS2P102/D
1 page  
MMDFS2P102
TYPICAL FET ELECTRICAL CHARACTERISTICS
1200
VDS = 0 VGS = 0
1000 Ciss
TJ = 25°C
800
600
Crss
400
Ciss
Coss
200 Crss
0
−10 −5.0 0 5.0 10 15 20
VGS VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
12
QT
10
18
16
14
8.0 12
6.0
4.0 Q1
Q2
VGS
ID = 2.0 A
10
8.0
6.0
2.0
0
0
Q3
4.0
VDS
8.0
TJ = 25°C
12
4.0
2.0
0
16
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and
Drain−To−Source Voltage versus Total Charge
2.0
VGS = 0 V
1.6 TJ = 25°C
100
td(off)
tf
tr
10
1.0
td(on)
10
100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
100 Mounted on 2″ sq. FR4 board (1″ sq. 2 oz. Cu 0.06″
thick single sided) with one die operating, 10 s max.
10 VGS = 20 V
SINGLE PULSE
TC = 25°C
1.0
10 ms
1.0 ms
100 ms
dc
10 ms
0.1
0.01
0.1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1.0
10
100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
1.2
0.8
0.4
0
0.5
0.7 0.9 1.1 1.3 1.5
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus
Current
350
300 ID = 6.0 A
250
200
150
100
50
0
25 50 75 100 125 150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
http://onsemi.com
5
5 Page 
MMDFS2P102
PACKAGE DIMENSIONS
SO−8
CASE 751−07
ISSUE V
−X−
A
B
−Y−
−Z−
H
85
S 0.25 (0.010) M Y M
1
4
K
G
D
C
SEATING
PLANE
N X 45 _
0.10 (0.004)
M
0.25 (0.010) M Z Y S X S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC
0.050 BSC
H 0.10 0.25 0.004 0.010
J J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0_ 8_ 0_ 8_
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
XXXXXX
ALYW
STYLE 18:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
FETKY is a trademark of International Rectifier Corporation.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
11
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MMDFS2P102/D
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet MMDFS2P102.PDF ] | |
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