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PDF ANX3111 Data sheet ( Hoja de datos )

Número de pieza ANX3111
Descripción Low Power DisplayPort to LVDS Converter
Fabricantes Analogix 
Logotipo Analogix Logotipo



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Product Brief
ANX3111
Low Power DisplayPort™ to LVDS Converter
with Single Channel 18-bpp Output
Features
All software compatible with AMD platform
driver/BIOS stacks
- Designed and fully tested with extensive
APU-based platform test requirements
- No additional firmware and EEPROM to
manage LCD dimming and video timing
control
Two package options available to support for
new and running-change platforms (36 & 64-
QFN)
Backward drop-in compatible with ANX3110
Super low power single channel 18-bit per pixel
LVDS output
- Single Channel: Up to 120 MHz pixel clock
- 50% power reduction: <100mW@65MHz
- Up to WSXGA+ 1680 x 1650 @ 60Hz, 18-
bpp
Smart panel dimming control state machine
compatible with Travis-based family products
Programmable directly through AUX or local
I2C slave port
Compliant with VESA DisplayPort™ 1.1a
- 1-lane with 1.62 / 2.7Gbps data rate
support
- AUX channel link up to 1Mbps bandwidth
- DPCD registers accessible by the AUX
channel and I2C Slave Interface
- Spread Spectrum Clock (SSC) support for
improved EMI performance
eDP content protection with Chip ID, OUI
support
Programmable LVDS swing, pre-emphasis,
channel swap, and polarity inversion
Programmable LVDS Output Spread Spectrum
Clocking Generation (SSCG) with amplitude +/-
1.75% for EMI reduction
Optional on-chip microcontroller with 512-Byte
program space
Recommend 3.3VIO and 1.2VCORE power supply
for APU platform
Optionally support 2.5VIO/1.2VCORE application
system
Package
- 64-pin QFN (9x9)
- RoHS compliant and Halogen free
ANX3111 has same 64 QFN package, drop-in-
compatible with dual-LVDS ANX3110 product in
AMD APU-based platform with Analogix’s low
power DisplayPortreceiver offering 18 bit-per-
pixel and single channel LVDS output. It provides a
high quality interface solution between AMD’s
APU processor and LVDS panels. Please refer to
the part ordering and related products
information.
Mainlink
Lane 0
DisplayPort
Receiver
Data
Decoder
Video
processing &
formatting
LVDS Tx
LVDS Output
HPD
AUX CH
Rev 1.0
Hot -Plug
Detect
Aux
Device Configuration
& Status Registers
I2C
master
Figure 1: ANX3111 Block Diagram
Analogix Semiconductor, Inc
3211 Scott Blvd., Suite 102, Santa Clara, CA 95054, USA
To EDID
June 2011

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