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IN24AA02 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 IN24AA02
部品説明 2K 1.8V CMOS Serial EEPROMs
メーカ Integral
ロゴ Integral ロゴ 

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IN24AA02 Datasheet, IN24AA02 PDF,ピン配置, 機能
TECHNICAL DATA
2K 1.8V CMOS Serial EEPROMs
IN24AA02
DESCRIPTION
IN24AA02 is a 2K-bit Electrically Erasable PROM. The
device is organized as a single block of 256x8 bit
memory with a two-wire serial interface. Low voltage
design permits operation down to 1.8V with standby
and active currents of only 1μA and 3mA respectively.
The IN24AA02 also has a page-write capability for up
to 8 bytes of data.
FEATURES
Single supply with operation down to 1.8V
Two version:
o Version A – pins A0, A1, A2 are using for the
addressing on a single bus system (up to eight
ICs),
o Version B – pins A0, A1, A2 are not using. Only
one IC may be using on a bus.
Low power CMOS technology
Organized as a single block of 256 bytes (256x8)
Two wire serial interface bus, IIC compatible
Schmitt trigger, filtered inputs for noise suppression
Output slope control to eliminate ground bounce
100 kHz (1.8V) and 400 kHz (2.5-5.5V) compatibility
Self-timed write cycle (including auto-erase)
Page-write buffer for up to 8 bytes
6 ms typical write cycle time for page-write
Hardware write protect for entire memory
Can be operated as a serial ROM
Factory programming (QTP) available
ESD protection > 2,000V
1,000,000 ERASE/WRITE cycles guaranteed
Data retention > 200 years
8-pin DIP, 8-pin SOP
Temperature range -40°C to +85°C (industrial)
Package Types
PIN ASSIGNMENT
PINNING
Name
Function
VSS Ground
SDA Serial Address/Data I/O
SCL Serial Clock
WP
VCC
AO, A1, A2
Write Protect Input
+1.8V to 5.5V Power Supply
Pins for device address selection
Note: Pins A0, A1 & A2 are not used for IN24AA02B (No internal connections)
INTEGRAL

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