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PDF STN1170 Data sheet ( Hoja de datos )
| Número de pieza | STN1170 | |
| Descripción | Multiprotocol OBD to UART Interpreter | |
| Fabricantes | OBD Solutions | |
| Logotipo |  |
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STN1170
Multiprotocol OBD to UART Interpreter
Datasheet
1 page  
4.1 Pinout Summary
STN1170
Table 1: Pinout Summary
Pin
Number
Pin Name
1 HS_CAN_TX
2 HS_CAN_RX
3 ¯U¯A¯R¯T¯_¯C¯T¯S¯
4 UART_TX
5 UART_RX
6 VSS
7 VCAP
8 I¯S¯O¯_¯R¯X¯
9 ¯IS¯O¯_¯K¯_¯T¯X¯
10 ¯IS¯O¯_¯L¯_¯T¯X¯
11 NC
12 ¯O¯B¯D¯_¯A¯C¯T¯_¯L¯E¯D¯ / ¯R¯S¯T¯_¯N¯V¯M¯
13 ¯H¯O¯S¯T¯_¯A¯C¯T¯_¯L¯E¯D¯
14 NC
15 NC
16 AVSS
17 AVDD
18 ¯R¯E¯S¯E¯T¯
19 ANALOG_IN
20 STATUS_LED
21 NC
22 NC
23 J1850_BUS+_TX
24 J¯1¯8¯5¯0¯_¯B¯U¯S¯-¯_¯T¯X
25 PWM_RX
26 VPW_RX
27 PWM/¯V¯P¯W¯
28 VDD
29 VSS
30 OSC1
31 OSC2
32 PWR_CTRL
33 S¯L¯E¯E¯¯P
Pin Type
Pin Description
OD, 5V, 4x High-speed CAN transmit output
I, 5V
High-speed CAN receive input
I, 5V
Active low UART clear to send input
OD, 5V, 2x
I, 5V
P
P
UART transmit output
UART receive input
Ground reference for logic and I/O pins
CPU logic filter capacitor connection
I, 5V
Active low ISO 9141/ISO 14230 K-line input
O, 2x
Active low ISO 9141/ISO 14230 K-line output
O, 4x
Active low ISO 9141/ISO 14230 L-line output
–
OD/I, 5V, 2x
O, 2x
Do not connect
Active low OBD activity LED output and active low
input to reset non-volatile settings to factory defaults
Active low host activity LED output
–
–
P
P
I, 5V
A
O, 4x
–
–
Do not connect
Do not connect
Analog ground reference
Analog positive supply
Active low device reset input
Analog voltage measurement input
Status LED output
Do not connect
Do not connect
O, 4x
SAE J1850 Bus+ transmit output
O, 4x
Active low SAE J1850 Bus- transmit output
I SAE J1850 PWM receive input
I SAE J1850 VPW receive input
O, 4x
SAE J1850 PWM/VPW Bus+ voltage select output
P
P
I
O
OD, 5V, 2x
Positive supply for logic and I/O pins
Ground reference for logic and I/O pins
16.000 MHz oscillator crystal input
16.000 MHz oscillator crystal output
External power control output
I External sleep control input
STN1170DSC
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5 of 26
5 Page 
5.6 Oscillator Pins
The oscillator circuit should be placed on the
same side of the board as the device. Also, place the
oscillator circuit close to the oscillator pins, not
exceeding one-half inch (12 mm) distance between
them. The load capacitors should be placed next to
the oscillator itself, on the same side of the board.
Use a grounded copper pour around the oscillator
circuit to isolate them from surrounding circuits. The
grounded copper pour should be routed directly to
the STN1170 ground. Do not run any signal traces or
power traces inside the ground pour. Also, if using a
two-sided board, avoid any traces on the other side
of the board where the crystal is placed.
5.7 NVM Reset Input
¯R¯S¯T¯_¯N¯V¯M¯ pin must be pulled up to VDD via a
100 kΩ resistor for proper device operation.
5.8 Open Drain Outputs
All open drain outputs (as specified in section 4.1)
that are in use must be pulled up to VDD or 5V.
Specifically, UART_TX pin must be pulled up in order
to be able to communicate with the device. See
section 4.2 “Detailed Pin Descriptions” for more
information.
5.9 Unused Inputs and Unused
Open Drain Outputs
None of the unused inputs or unused open drain
outputs (as specified in section 4.1) should be left
unconnected. The STN1170 is a CMOS integrated
circuit. Leaving any of its inputs or open drain outputs
floating may result in IC damage.
Unused open drain outputs can only be
terminated with a resistor connected to VDD or 5V.
Unused inputs can be terminated via a resistor or
direct connection to VSS or VDD.
Unused inputs and open drain outputs should be
connected as shown in Table 2. See section 4.2
“Detailed Pin Descriptions” and section 6.1
“Recommended Minimum Connection” for more
information.
STN1170
Table 2 – Recommended Unused Input and
Open Drain Output Connections
Pin
Number
Pin Name
1 HS_CAN_TX
2 HS_CAN_RX
3 UART_CTS
4 UART_TX
5 UART_RX
8 I¯S¯O¯_¯R¯X¯
12 ¯O¯B¯D¯_¯A¯C¯T¯_¯L¯E¯D¯ / ¯R¯S¯T¯_¯N¯V¯M¯
18 ¯R¯E¯S¯E¯T¯
19 ANALOG_IN
25 PWM_RX
26 VPW_RX
32 PWR_CTRL
33 S¯L¯E¯E¯¯P
35 SW_CAN_MODE1
36 SW_CAN_MODE0
37 SW_CAN_TX
38 SW_CAN_RX
43 MS_CAN_TX
44 MS_CAN_RX
Level
H(2)
H
L
H(2)
H
L(1)
H(2)
H
L(1)
L(1)
L(1)
L(3)
H
—(4)
—(4)
H(2)
H
H(2)
H
Note 1.
2.
3.
4.
These inputs may be connected to either VDD or
VSS. However, the preferred level is shown.
These open drain outputs cannot be connected to
VDD directly. They can only be connected to VDD or
5V via a resistor.
These open drain outputs should not be connected
to VSS directly. For reduced current consumption
during sleep, when unused, these outputs should
be connected to VSS via a resistor.
These open drain outputs are driven low when the
single-wire CAN channel is not selected. Therefore,
they can be left unconnected if unused.
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