|
|
PDF ADP5304 Data sheet ( Hoja de datos )
| Número de pieza | ADP5304 | |
| Descripción | Ultralow Power Step-Down Regulator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ADP5304 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
|
No Preview Available !
Data Sheet
Ultralow Power Step-Down Regulator
for Energy Harvesting
ADP5304
FEATURES
Input supply voltage range: 2.15 V to 6.50 V
Operation down to 2.00 V typical
Ultralow, 260 nA typical quiescent current with no load
Selective output voltage from 1.2 V to 3.6 V (or 0.8 V to 5.0 V)
±2.5% output accuracy over the full temperature range
Output current up to 50 mA in hysteresis mode
VINOK flag to monitor the input voltage
100% duty cycle operation mode
Quick output discharge (QOD) option
Undervoltage lockout (UVLO), overcurrent protection (OCP),
and thermal shutdown (TSD) protection
10-lead, 3 mm × 3 mm LFCSP package
−40°C to +125°C operating junction temperature range
APPLICATIONS
Energy (gas, water) metering
Energy harvesting applications
Portable and battery-powered equipment
Medical applications
Keep-alive power supply
TYPICAL APPLICATION CIRCUIT
VIN = 2.15V TO 6.5V
10µF
PVIN
SW
ADP5304
ON
OFF
EN
PGND
2.2µH
10µF
VOUT
MODE
NC
AGND
FB
VINOK
VID
EPAD
VID0: 1.2V VID8: 2.5V
VID1: 1.5V VID9: 2.6V
R0
VID2: 1.8V
VID3: 2.0V
VID10: 2.7V
VID11: 2.8V
VID4: 2.1V VID12: 2.9V
VID5: 2.2V VID13: 3.0V
VID6: 2.3V VID14: 3.3V
VID7: 2.4V VID15: 3.6V
Figure 1.
GENERAL DESCRIPTION
The ADP5304 is a high efficient, ultralow quiescent current
step-down regulator that draws only 260 nA of quiescent
current to regulate the output at no load.
The ADP5304 runs from an input voltage range of 2.15 V to
6.50 V, allowing the use of the multiple alkaline, NiMH, and
Lithium cells, or the use of a high impedance power source. The
output voltage is selectable from 0.8 V to 5.0 V by an external
VID resistor to ground. The total solution requires only four
tiny external components.
The ADP5304 operates in hysteresis mode via connecting the
MODE pin to ground. In hysteresis mode, the regulator
achieves excellent efficiency at a power of less than 1 mW and
provides up to 50 mA of output load. The device enables very
efficient power management to achieve the collection of small
amounts of energy from the high impedance battery or the
energy harvester to charge up the conventional capacitor or
super capacitor.
The ADP5304 integrates an ultralow power comparator with a
factory programmable voltage reference to monitor the voltage
of the input power source. The voltage reference, with hysteresis, is
the threshold for the stopping and the starting of the switching,
allowing the use of the high impedance power source.
Other key features of the ADP5304 include separate enabling
and a QOD. Safety features, such as OCP, TSD, and input
UVLO are also included.
The ADP5304 is available in 10-lead, 3 mm × 3 mm LFCSP
package rated for the −40°C to +125°C junction temperature range.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
PVIN to PGND
SW to PGND
FB to AGND
VID to AGND
EN to AGND
VINOK to AGND
MODE to AGND
NC to AGND
PGND to AGND
Storage Temperate Range
Operating Junction Temperature Range
Rating
−0.3 V to +7 V
−0.3 V to PVIN + 0.3 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to +0.3 V
−65°C to +150°C
−40°C to +125°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ADP5304
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
10-Lead, 3 mm × 3 mm LFCSP
θJA
57
θJC Unit
0.86 °C/W
ESD CAUTION
Rev. 0 | Page 5 of 17
5 Page 
Data Sheet
THEORY OF OPERATION
The ADP5304 is a high efficient, ultralow quiescent current
step-down regulator in a 10-lead LFCSP package, designed to
meet demanding performance and board space requirements.
The device enables direct connection to a wide input voltage
range of 2.15 V to 6.50 V, allowing the use of high impedance
power sources or energy harvester sources.
BUCK REGULATOR OPERATIONAL MODE
The ADP5304 buck regulator operates in hysteresis mode and
charges the output voltage slightly higher than its nominal
output voltage with PWM pulses via the regulation of constant
peak inductor current. When the output voltage increases until
the output sense signal exceeds the hysteresis upper threshold,
the regulator enters the standby mode. In standby mode, the
high-side and low-side MOSFET and a majority of the circuitry
are disabled to allow a low quiescent current, as well as high
efficiency performance. During standby mode, the output
capacitor supplies the energy into the load and the output
voltage decreases until it falls below the hysteresis comparator
lower threshold. Then, the buck regulator wakes up into active
mode and generates the PWM pulses to charge the output again.
The buck regulator is forced to operate in hysteresis mode via
connecting the MODE pin to ground. The regulator only draws
260 nA of quiescent current to regulate the output under zero load,
which allows the regulator to act as keep-alive power supply in
battery-powered applications or energy harvesting systems.
ADJUSTABLE AND FIXED OUTPUT VOLTAGES
The ADP5304 provides adjustable output voltage settings via
the connection of one resistor through the VID pin to AGND.
The VID detection circuitry works in the start-up period, and
the voltage ID code is sampled and held into the internal
register and does not change until the next power recycle.
Furthermore, the ADP5304 provides a fixed output voltage
programmed via the factory fuse. In this condition, connect
the VID pin to the PVIN pin.
For output voltage settings, the feedback resistor divider is built
in to the ADP5304, and the feedback pin (FB) must be tied
directly to the output. An ultralow power voltage reference and
an integrated high impedance (50 MΩ, typical) feedback
divider network contribute to low quiescent current. Table 5
lists the output voltage options by the VID pin configurations. It
is recommended to use a 1% resistor.
ADP5304
Table 5. Output Voltage Options by the VID Pin
VID
Configuration
VOUT,
VOUT,
Factory Option 0 (V) Factory Option 1 (V)
Short to ground 3.0
3.1
Short to PVIN
2.5
1.3
RVID = 499 kΩ
3.6
5.0
RVID = 316 kΩ
3.3
4.5
RVID = 226 kΩ
2.9
4.2
RVID = 174 kΩ
2.8
3.9
RVID = 127 kΩ
2.7
3.4
RVID = 97.6 kΩ
2.6
3.2
RVID = 76.8 kΩ
2.4
1.9
RVID = 56.2 kΩ
2.3
1.7
RVID = 43 kΩ
2.2
1.6
RVID = 32.4 kΩ
2.1
1.4
RVID = 25.5 kΩ
2.0
1.1
RVID = 19.6 kΩ
1.8
1.0
RVID = 15 kΩ
1.5
0.9
RVID = 11.8 kΩ
1.2
0.8
UNDERVOLTAGE LOCKOUT (UVLO)
The undervoltage lockout circuitry monitors the input voltage
level on the PVIN pin. If input voltage falls below 2.00 V
(typical), the regulator turns off. After the input voltage rises
above 2.06 V (typical), the soft start period initiates, and when
the EN pin is high, the regulator enables.
ENABLE/DISABLE
The ADP5304 includes a separate enable (EN) pin. A logic high
on the EN pin starts the regulator. Due to the low quiescent current
design, it is typical for the regulator to start switching after a
delay of a few milliseconds from the EN pin being pulled high.
A logic low on the EN pin immediately disables the regulator
and brings the regulator into extremely low current consumption.
VINOK FUNCTION
The ADP5304 includes an open-drain VINOK output that can
be used to indicate the input voltage status. The VINOK output
becomes active high when the input voltage on the PVIN pin is
above the reference threshold. When the input voltage falls below
the reference threshold, the VINOK pin goes low. Note that a
relatively long validation time of 130 μs typical exists for the
VINOK output status to change due to the ultralow power
comparator design.
Rev. 0 | Page 11 of 17
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ADP5304.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ADP5300 | Ultralow Power Step-Down Regulator | Analog Devices |
| ADP5301 | Ultralow Power Step-Down Regulator | Analog Devices |
| ADP5302 | Ultralow Power Step-Down Regulator | Analog Devices |
| ADP5303 | Ultralow Power Step-Down Regulator | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |