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PDF PIC24F08KL201 Data sheet ( Hoja de datos )
| Número de pieza | PIC24F08KL201 | |
| Descripción | 16-Bit Flash Microcontrollers | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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PIC24F16KL402 FAMILY
Low-Power, Low-Cost, General Purpose
16-Bit Flash Microcontrollers with XLP Technology
Power Management Modes:
• Run – CPU, Flash, SRAM and Peripherals On
• Doze – CPU Clock Runs Slower than Peripherals
• Idle – CPU Off, SRAM and Peripherals On
• Sleep – CPU, Flash and Peripherals Off and SRAM On
• Low-Power Consumption:
- Run mode currents of 150 µA/MHz typical at 1.8V
- Idle mode currents under 80 µA/MHz at 1.8V
- Sleep mode currents as low as 30 nA at +25°C
- Watchdog Timer as low as 210 nA at +25°C
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator:
- 4x PLL option
- Multiple divide options
• 17-Bit x 17-Bit Single-Cycle Hardware
Fractional/integer Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set
Architecture (ISA):
- 76 base instructions
- Flexible addressing modes
• Linear Program Memory Addressing
• Linear Data Memory Addressing
• Two Address Generation Units (AGU) for Separate
Read and Write Addressing of Data Memory
Memory
Peripheral Features:
• High-Current Sink/Source (18 mA/18 mA) on All
I/O Pins
• Configurable Open-Drain Outputs on Digital I/O Pins
• Up to Three External Interrupt Sources
• Two 16-Bit Timer/Counters with Selectable Clock
Sources
• Up to Two 8-Bit Timers/Counters with Programmable
Prescalers
• Two Capture/Compare/PWM (CCP) modules:
- Modules automatically configure and drive I/O
- 16-bit Capture with max. resolution 40 ns
- 16-bit Compare with max. resolution 83.3 ns
- 1-bit to 10-bit PWM resolution
• Up to One Enhanced CCP module:
- Backward compatible with CCP
- 1, 2 or 4 PWM outputs
- Programmable dead time
- Auto-shutdown on external event
• Up to Two Master Synchronous Serial Port modules
(MSSPs) with Two Modes of Operation:
- 3-wire SPI (all four modes)
- I2C™ Master, Multi-Master and Slave modes and
7-Bit/10-Bit Addressing
• Up to Two UART modules:
- Supports RS-485, RS-232 and LIN/J2602
- On-chip hardware encoder/decoder for IrDA®
- Auto-wake-up on Start bit
- Auto-Baud Detect (ABD)
- Two-byte transmit and receive FIFO buffers
Peripherals
Device
Pins
Flash
Program
(bytes)
Data
(bytes)
Data
EEPROM
(bytes)
PIC24F16KL402
PIC24F08KL402
PIC24F16KL401
PIC24F08KL401
PIC24F08KL302
PIC24F08KL301
PIC24F08KL201
PIC24F08KL200
PIC24F04KL101
PIC24F04KL100
28
28
20
20
28
20
20
14
20
14
16K
8K
16K
8K
8K
8K
8K
8K
4K
4K
1024
1024
1024
1024
1024
1024
512
512
512
512
512 12 2 2/2 2/1 2
512 12 2 2/2 2/1 2
512 12 2 2/2 2/1 2
512 12 2 2/2 2/1 2
256 — 2 2/2 2/1 2
256 — 2 2/2 2/1 2
— 12 1 1/2 2/0 1
— 7 1 1/2 2/0 1
— — 1 1/2 2/0 1
— — 1 1/2 2/0 1
2Y
2Y
2Y
2Y
2Y
2Y
1Y
1Y
1Y
1Y
2011-2013 Microchip Technology Inc.
DS30001037C-page 1
1 page  
PIC24F16KL402 FAMILY
Pin Diagrams: PIC24FXXKL10X/20X
20-Pin QFN(1)
PGED1/AN2/ULPWU/C1IND/CN4/RB0
PGEC1/AN3/C1INC/CN5/RB1
AN4/T3G/U1RX/CN6/RB2
OSCI/AN13/C1INB/CLKI/CN30/RA2
OSCO/AN14/C1INA/CLKO/CN29/RA3
20 19 18 17 16
1 15
2
3
PIC24FXXKL101(2)
14
13
4 PIC24FXXKL201 12
5 11
6 7 8 9 10
AN9/T3CK/REFO/CN11/RB15
CVREF/AN10/SDI1/C1OUT/INT1/CN12/RB14
AN11/SDO1/CN13/RB13
AN12/HLVDIN/SCK1/CCP2/CN14/RB12
CCP1/INT2/CN8/RA6
20-Pin PDIP/SSOP/SOIC(1)
MCLR/VPP/RA5
PGEC2/VREF+/CVREF+/AN0/CN2/RA0
PGED2/CVREF-/VREF-/AN1/CN3/RA1
PGED1/AN2/ULPWU/C1IND/CN4/RB0
PGEC1/AN3/C1INC/CN5/RB1
AN4/T3G/U1RX/CN6/RB2
OSCI/AN13/C1INB/CLKI/CN30/RA2
OSCO/AN14/C1INA/CLKO/CN29/RA3
PGED3/SOSCI/AN15/CN1/RB4
PGEC3/SOSCO/SCLKI/CN0/RA4
1
2
3
4
5
6
7
8
9
10
20 VDD
19 VSS
18 AN9/T3CK/REFO/CN11/RB15
17 CVREF/AN10/SDI1/C1OUT/INT1/CN12/RB14
16 AN11/SDO1/CN13/RB13
15 AN12/HLVDIN/SCK1/CCP2/CN14/RB12
14 CCP1/INT2/CN8/RA6
13 SDA1/T1CK/U1RTS/CN21/RB9
12 SCL1/U1CTS/SS1/CN22/RB8
11 U1TX/INT0/CN23/RB7
14-Pin PDIP/TSSOP(1)
MCLR/VPP/RA5
PGEC2/VREF+/CVREF+/AN0/CN2/RA0
PGED2/CVREF-/VREF-/AN1/ULPWU/CN3/RA1
OSCI/AN13/C1INB/CLKI/CN30/RA2
OSCO/AN14/C1INA/CLKO/CN29/RA3
PGED3/SOSCI/AN15/HLVDIN/CN1/RB4
PGEC3/SOSCO/SCLKI/CN0/RA4
1
2
3
4
5
6
7
14 VDD
13 VSS
12 AN9/T3CK/REFO/U1RX/SS1/INT0/CN11/RB15
11 CVREF/AN10/T3G/U1TX/SDI1/C1OUT/INT1/CN12/RB14
10 CCP1/INT2/CN8/RA6
9 SDA1/T1CK/U1RTS/SDO1/CCP2/CN21/RB9
8 SCL1/U1CTS/SCK1/CN22/RB8
Note 1: Analog features (indicated in red) are not available on PIC24FXXKL100/101 devices.
2: Alternate location for I2C™ functionality of MSSP1, as determined by the I2C1SEL Configuration bit.
2011-2013 Microchip Technology Inc.
DS30001037C-page 5
5 Page 
PIC24F16KL402 FAMILY
TABLE 1-2: DEVICE FEATURES FOR PIC24F16KL40X/30X DEVICES
Features
Operating Frequency
Program Memory (bytes)
Program Memory (instructions)
Data Memory (bytes)
Data EEPROM Memory (bytes)
Interrupt Sources
(soft vectors/NMI traps)
I/O Ports
Total I/O Pins
Timers (8/16-bit)
Capture/Compare/PWM modules:
Total
Enhanced CCP
Input Change Notification Interrupt
Serial Communications:
UART
MSSP
10-Bit Analog-to-Digital Module
(input channels)
Analog Comparators
Resets (and delays)
Instruction Set
Packages
16K
5632
1024
512
31 (27/4)
8K
2816
1024
512
31 (27/4)
DC – 32 MHz
8K 16K
2816
5632
1024
1024
256 512
30 (26/4) 31 (27/4)
8K
2816
1024
512
31 (27/4)
8K
2816
1024
256
30 (26/4)
PORTA<7:0>
PORTB<15:0>
24
2/2 2/2 2/2
PORTA<6:0>
PORTB<15:12,9:7,4,2:0>
18
2/2 2/2 2/2
333333
111111
23 23 23 17 17 17
222222
222222
12 12 — 12 12 —
222222
POR, BOR, RESET Instruction, MCLR, WDT, Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(PWRT, OST, PLL Lock)
76 Base Instructions, Multiple Addressing Mode Variations
28-Pin SPDIP/SSOP/SOIC/QFN
20-Pin PDIP/SSOP/SOIC/QFN
2011-2013 Microchip Technology Inc.
DS30001037C-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PIC24F08KL201.PDF ] | |
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