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PDF STP10N65K3 Data sheet ( Hoja de datos )

Número de pieza STP10N65K3
Descripción N-channel Power MOSFET
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STP10N65K3 Hoja de datos, Descripción, Manual

STB10N65K3, STF10N65K3,
STFI10N65K3, STP10N65K3
N-channel 650 V, 0.75 Ω typ., 10 A SuperMESH3™ Power MOSFETs
in D2PAK, TO-220FP, I2PAKFP and TO-220 packages
Datasheet - production data
Features
TAB
3
1
D2PAK
3
2
1
TO-220FP
TAB
I2PAKFP (TO-281)
3
2
1
TO-220
Figure 1. Internal schematic diagram
' 7$%
Order codes
STB10N65K3
STF10N65K3
STFI10N65K3
STP10N65K3
VDS RDS(on) max
ID PTOT
150 W
650 V 1 Ω 10 A 35 W
150 W
100% avalanche tested
Extremely low on-resistance RDS(on)
Gate charge minimized
Very low intrinsic capacitances
Improved diode reverse recovery
characteristics
Zener-protected
* 
6 
AM01476v1
Applications
Switching applications
Description
These SuperMESH3™ Power MOSFETs are the
result of improvements applied to
STMicroelectronics’ SuperMESH™ technology,
combined with a new optimized vertical structure.
These devices boast an extremely low on-
resistance, superior dynamic performance and
high avalanche capability, rendering them suitable
for the most demanding applications.
Order codes
STB10N65K3
STF10N65K3
STFI10N65K3
STP10N65K3
Table 1. Device summary
Marking
Package
D2PAK
10N65K3
TO-220FP
I2PAKFP (TO-281)
TO-220
Packaging
Tape and reel
Tube
August 2013
This is information on a product in full production.
DocID15732 Rev 4
1/21
www.st.com

1 page




STP10N65K3 pdf
STB10N65K3, STF10N65K3, STFI10N65K3, STP10N65K3
Electrical characteristics
Table 7. Source drain diode
Symbol
Parameter
Test conditions
ISD
ISDM (1)
VSD (2)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 7 A, VGS = 0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 7 A, di/dt = 100A/µs
VDD = 60 V (see Figure 22)
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 7 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 22)
1. Pulse width limited by safe operating area.
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Min. Typ. Max. Unit
- 7.2 A
28.8 A
- 1.5 V
- 320
ns
-2
µC
- 13
A
- 410
ns
- 2.9
µC
- 14
A
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min Typ. Max. Unit
V(BR)GSO Gate-source breakdown voltage IGS = ± 1mA, ID=0
30 - - V
The built-in back-to-back Zener diodes have been specifically designed to enhance not only
the device’s ESD capability, but also to make them capable of safely absorbing any voltage
transients that may occasionally be applied from gate to source. In this respect, the Zener
voltage is appropriate to achieve efficient and cost-effective protection of device integrity.
The integrated Zener diodes thus eliminate the need for external components.
DocID15732 Rev 4
5/21
21

5 Page





STP10N65K3 arduino
STB10N65K3, STF10N65K3, STFI10N65K3, STP10N65K3
Package mechanical data
Dim.
A
A1
b
b2
c
c2
D
D1
E
E1
e
e1
H
J1
L
L1
L2
R
V2
Table 9. D²PAK (TO-263) mechanical data
mm
Min.
4.40
0.03
0.70
1.14
0.45
1.23
8.95
7.50
10
8.50
4.88
15
2.49
2.29
1.27
1.30
Typ.
2.54
0.4
Max.
4.60
0.23
0.93
1.70
0.60
1.36
9.35
10.40
5.28
15.85
2.69
2.79
1.40
1.75
DocID15732 Rev 4
11/21
21

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