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GD5F1GQ4UAYIGのメーカーはGigaDeviceです、この部品の機能は「SPI (Serial Peripheral Interface) NAND Flash Memory」です。 |
部品番号 | GD5F1GQ4UAYIG |
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部品説明 | SPI (Serial Peripheral Interface) NAND Flash Memory | ||
メーカ | GigaDevice | ||
ロゴ | |||
このページの下部にプレビューとGD5F1GQ4UAYIGダウンロード(pdfファイル)リンクがあります。 Total 30 pages
SPI(x1/x2/x4) NAND Flash
GD5F1GQ4UAYIG
SPI (Serial Peripheral Interface) NAND Flash Memory
FEATURE
◆ 1G-bit Serial NAND Flash
-128M-byte
-2048 bytes page for read and program, spare 64bytes
-(128K + 4K)bytes per block for erase
◆ Program/Erase/Read Speed
-Page Program time: 400us typical
-Block Erase time: 3ms typical
-Page read time: 120us maximum(w/I ECC)
◆ Standard, Dual, Quad SPI
-Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#
-Dual SPI: SCLK, CS#, SIO0, SIO1, WP#, HOLD#
-Quad SPI: SCLK, CS#, SIO0, SIO1, SIO2, SIO3
◆ Low Power Consumption
-40mA maximum active current
-70uA maximum standby current
◆ High Speed Clock Frequency
-108MHz for fast read with 30PF load
-Quad I/O Data transfer up to 480Mbits/s
-2112/2048/64/16 wrap read option
◆ Enhanced access performance
-2kbyte cache for fast random read
-Cache read and cache program
◆ Software/Hardware Write Protection
-Write protect all/portion of memory via software
-Enable/Disable protection with WP# Pin
-Top or Bottom, Block selection combination
◆ Advanced Feature for NAND
-Internal ECC option, per 512bytes
-Internal data move by page with ECC
-Promised golden block0
◆ Advanced security Features
-8K-Byte OTP Region
◆ Single Power Supply Voltage
-Full voltage range:2.7~3.6V
Note: please contact GigaDevice for details
1
1 Page SPI(x1/x2/x4) NAND Flash
PIN DESCRIPTION
Pin Name
I/O Description
CS# I Chip Select input, active low
SO/SIO1
I/O Serial Data Output / Serial Data Input Output 1
WP#/SIO2
I/O Write Protect, active low / Serial Data Input Output 2
VSS
Ground Ground
SI/SIO0
I/O Serial Data Input / Serial Data Input Output 0
SCLK
I Serial Clock input
HOLD#/SIO3
I/O
Hold input, active low / Serial Data Input Output3
VCC
Supply Power Supply
GD5F1GQ4UAYIG
BLOCK DIAGRAM
HOLD#/ WP#/
SCLK SI/SIO0 SO/SIO1 CS# SIO3 SIO2
Serial NAND controler
Vcc
Vss
Cache
NAND
memory
memory
core
ECC and status register
ARRAY ORGANIZATION
Each device has
128M+4M
1024 x 64
1024
Each block has
128K+4K
64
-
3
Each page has
2K+64
-
-
bytes
pages
blocks
3Pages SPI(x1/x2/x4) NAND Flash
Figure3. Hold Condition
CS#
SCLK
HOLD#
HOLD
HOLD
GD5F1GQ4UAYIG
Write Protection
SPI NAND provides Hardware Protection Mode besides the Software Mode. Write Protect (WP#) prevents the
block lock bits (BP0, BP1, BP2 and INV, CMP) from being overwritten. If the BRWD bit is set to 1 and WP# is LOW, the
block protect bits cannot be altered.
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6 Page | |||
ページ | 合計 : 30 ページ | ||
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PDF ダウンロード | [ GD5F1GQ4UAYIG データシート.PDF ] |
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部品番号 | 部品説明 | メーカ |
GD5F1GQ4UAYIG | SPI (Serial Peripheral Interface) NAND Flash Memory | GigaDevice |