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IR3598MTRPBFのメーカーはInternational Rectifierです、この部品の機能は「Dual/Doubler Interleaved MOSFET Driver」です。 |
部品番号 | IR3598MTRPBF |
| |
部品説明 | Dual/Doubler Interleaved MOSFET Driver | ||
メーカ | International Rectifier | ||
ロゴ | |||
このページの下部にプレビューとIR3598MTRPBFダウンロード(pdfファイル)リンクがあります。 Total 21 pages
Dual/Doubler Interleaved MOSFET Driver IR3598
FEATURES
Dual MOSFET drivers in single 16 pin QFN
package
Buck Converter Driver Vin 4.0 to 13.2Vdc
Multimode operation to configure the driver
as either dual or doubler/interleaved mode
drivers
Variable Gate drive from 4V to 13V to
optimize system efficiency
5V VCC and VDRV capability for sleep states
where only 5V is available
Large drivers designed to drive 3nF in < 12ns
with any voltage from 5V to 12V (typ)
supplied to the VDRV pin
Low side driver – 0.85Ω source/0.38Ω sink
High side driver – 1.1Ω source/0.60Ω sink
Propagation delays < 20ns
Integrated bootstrap diode on both drivers
Capable of high output switching frequencies
from 150kHz up to greater than 1MHz
Compatible with IR’s patented Active
Tri‐Level (ATL) PWM for fastest response to
transient overshoot as well as industry
standard 3.3V and 5V Tri‐State signals in
most modes
Non‐overlap and under voltage protection
Thermally enhanced 16 pin QFN package
Lead free RoHS compliant package
Low Quiescent power to optimize efficiency
BASIC APPLICATION
DESCRIPTION
The IR3598 is a high‐efficiency dual driver capable of switching
a pair of high and low side N‐channel MOSFETs in synchronous
buck converters and is optimized for use with IR’s Digital PWM
controllers to provide a total voltage regulator solution for today’s
advanced computing applications. In a space saving 16‐pin QFN
package, the IR3598 can significantly improve density in high
phase count voltage regulators saving over 50% board space
versus conventional drivers.
The IR3598 can be configured as two independent drivers in DUAL
mode with individual PWM signals, or as an interleaved DOUBLER
driver where one PWM signal is internally split to drive the two
pairs of MOSFETs 180° out of phase. The inter‐leaving action is
optimized internally to manage the tri‐state action of multiple
phases during transients, low current single phase operation, and
PS2 operation (see Figs. 8 and 9.) The DOUBLER mode can double
the effective maximum phase count from the controller, enabling
a well‐controlled, high phase count voltage regulator.
The IR3598 has a proprietary circuit which maintains the MOSFET
drive strength throughout the 4.0V to 13.2V drive voltage range
thus insuring fast switching even with 5V standby drive operation
during system sleep modes. The integrated boot diodes reduce
external component count. The IR3598 also features an adaptive
non‐overlap control for shoot‐through protection.
The IR3598 PWM inputs are compatible with IR’s fast Active
Tri‐Level (ATL) PWM signals as well as 3.3V and 5V Tri‐State
PWM signals.
APPLICATIONS
Desktop CPU and GPU solutions
Performance overclocking CPU and GPU VR solutions
Optimized for Sleep state S3 systems using +5VSB
PIN DIAGRAM
Figure 1: IR3598 Typical DOUBLER Mode
Application Circuit
1 October 25, 2013 | FINAL | V1.12
Figure 2: IR3598 Package Top View
1 Page Dual/Doubler Interleaved MOSFET Driver IR3598
FUNCTIONAL BLOCK DIAGRAM
Figure 3: IR3598 Simplified Functional Block Diagram
TABLE 1: MODE CONFIGURATION TABLE
Function
0
Mode
1
PWM Mode
IR ATL
Phase Mode
Dual
1 1
IR ATL
Doubler
0 0 Tri‐State
Dual
1 0 Tri‐State Doubler
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3Pages PIN DESCRIPTIONS
Dual/Doubler Interleaved MOSFET Driver IR3598
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
(PAD) 17
PIN NAME
PIN DESCRIPTION
BOOT1
MODE
VDRV
BOOT2
SW2
HG2
LG2
PWM2
EN
NC
VCC
FUNCTION
PWM1
LG1
HG1
SW1
GND
Floating bootstrap supply pin for the upper gate drive HG1. Connect the bootstrap capacitor between this pin
and the SW1 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal
Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.
The MODE pin is an input signal used to set the PWM MODE (Tri‐State or IR ATL) of the drivers.
The MODE pin levels are controlled by connecting the MODE pin to Ground or connecting to VCC. Refer to the
configuration instructions in Table 1 to program the mode pin. Do not let this pin float. The mode pin must be
directly connected to ground when this is the connection. Do not connect through a resistor when connecting
to ground. The mode pin is low when the pin voltage is below 0.8Vdc and high when the pin voltage is above
2Vdc.
Connect this pin to a separate supply voltage between 4.0V and 13.2V to vary the drive voltage
on both the high side and low side MOSFET’s. Place a high quality low ESR ceramic capacitor from this pin to
GND. Note that on the high side MOSFET’s, the gate drive voltage will be VDRV less the boot strap diode voltage
drop.
Floating bootstrap supply pin for the upper gate drive HG2. Connect the bootstrap capacitor between this pin
and the SW2 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal
Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET of the second power
stage, driven by HG2 and LG2. This pin provides a return path for the upper gate drive.
Upper gate drive output of Driver 2. Connect to gate of high‐side power N‐Channel MOSFET of the second
power stage.
Lower gate drive output of Driver 2. Connect to gate of the low‐side power N‐Channel MOSFET
of the second power stage.
The PWM2 signal is the control input for the second driver from either an IR ATL compatible source or an
industry standard Tri‐State source. Connect this pin to the PWM output of the controller.
As a DUAL driver, PWM2 controls the behavior of Gate Driver 2 (HG2, LG2). In DOUBLER mode this pin is not
used and must be left open.
The chip will be enabled with the EN pin left open, or pulled high to VCC. The enable is low when the pin
voltage is below 0.8Vdc and high when the pin voltage is above 2Vdc.
This pin must be left open.
Connect this pin to a +5V bias supply. Place a high quality low ESR 0.1uF ceramic capacitor from this pin to the
IR3598 GND.
The FUNCTION pin controls the Phase Mode (Dual or Doubler Modes). The FUNCTION pin levels are controlled
by connecting the FUNCTION pin to Ground or VCC. Refer to the configuration instructions in Table 1 to
program the FUNCTION pin. At power up, the function pin selection is latched into the IR3598, and therefore
cannot be changed after initial power up. The function pin is low when the pin voltage is below 1 Vdc and high
when the pin voltage is above 4.2Vdc.
The PWM1 signal is the control input for the first driver from either an IR ATL compatible source
or an industry standard Tri‐State source. Connect this pin to the PWM output of the controller.
As a DUAL driver, PWM1 controls the behavior of Gate Driver 1 (HG1, LG1). In DOUBLER mode
PWM1 controls the behavior of Gate Drive 1 (HG1, LG1) and Gate Drive 2 (HG2, LG2).
Lower gate drive output of Driver 1. Connect to gate of the low‐side power N‐Channel MOSFET
of the first power stage.
Upper gate drive output of Driver 1. Connect to gate of high‐side power N‐Channel MOSFET
of the first power stage.
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET of the first power
stage. This pin provides a return path for the upper gate drive.
Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the
driver.
6 October 25, 2013 | FINAL | V1.12
6 Page | |||
ページ | 合計 : 21 ページ | ||
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部品番号 | 部品説明 | メーカ |
IR3598MTRPBF | Dual/Doubler Interleaved MOSFET Driver | International Rectifier |