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Número de pieza | HCPL-7860 | |
Descripción | Optically Isolated Sigma-Delta (S-D) Modulator | |
Fabricantes | Avago | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HCPL-7860 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
No Preview Available ! HCPL-7860/HCPL-786J
Optically Isolated Sigma-Delta (S-D) Modulator
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
The HCPL-7860/HCPL-786J Optically Isolated Modulator
and HCPL-0872 Digital Interface IC or digital filter together
form an isolated programmable two-chip analog-to-digital
converter. The isolated modulator allows direct measure-
ment of motor phase currents in power inverters.
In operation, the HCPL-7860/HCPL-786J Isolated Modula-
tor converts a low-bandwidth analog input into a high-
speed one-bit data stream by means of a Sigma-Delta
(Σ−∆) over-sampling modulator. This modulation provides
for high noise margins and excellent immunity against
isolation-mode transients. The modulator data and on-
chip sampling clock are encoded and transmitted across
the isolation boundary where they are recovered and de-
coded into separate high-speed clock and data channels.
Features
• 12-bit Linearity
• 200 ns Conversion Time
(Pre-Trigger Mode 2 with HCPL-0872)
• 12-bit Effective Resolution with 5 µs Signal Delay
(14-bit with 102 µs) (with HCPL-0872)
• Fast 3 µs Over-Range Detection (with HCPL-0872)
• ± 200 mV Input Range with Single 5 V Supply
• 1% Internal Reference Voltage Matching
• Offset Calibration (with HCPL-0872)
• -40°C to +85°C Operating Temperature Range
• 15 kV/µs Isolation Transient Immunity
• Safety Approval: UL 1577, CSA and IEC/EN/DIN EN
60747-5-5
Applications
• Motor Phase and Rail Current Sensing
• Data Acquisition Systems
• Industrial Process Control
• Inverter Current Sensing
• General Purpose Current Sensing and Monitoring
Input
Current
18
2 SIGMA
DELTA
MOD./
3 ENCODE
DECODE
7
6
45
HCPL-7860
HCPL-0872
or
Digital Filter
MCU
or
DSP
NOTE: A 0.1 μF bypass capacitor must be connected between pins VDD1 and GND1 and between pins VDD2 and GND2.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this
component to prevent damage and/or degradation which may be induced by ESD. The components
featured in this datasheet are not to be used in military or aerospace applications or environments.
1 page Recommended Pb-Free IR Profile
Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used.
Regulatory Information
The HCPL-7860/HCPL-786J has been approved by the following organizations:
IEC/EN/DIN EN 60747-5-5
UL
CSA
Approved under: DIN EN 60747-5-5(VDE 0884-5):2011-11
Approval under UL 1577, component recognition program. File E55361.
Approval under CSA Component Acceptance Notice #5, File CA 88324.
IEC/EN/DIN EN 60747-5-5 Insulation Characteristics [1]
Description
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 300 Vrms
for rated mains voltage ≤ 450 Vrms
for rated mains voltage ≤ 600 Vrms
for rated mains voltage ≤ 1000 Vrms
Climatic Classification
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b [2]
VIORM x 1.875=VPR, 100% Production Test with tm=1 sec,
Partial discharge < 5 pC
Input to Output Test Voltage, Method a[2]
VIORM x 1.6=VPR, Type and Sample Test, tm=10 sec,
Partial discharge < 5 pC
Highest Allowable Overvoltage(Transient Overvoltage tini = 60 sec)
Safety-limiting values - maximum values allowed in the event of a failure.
Case Temperature
Input Current [3]
Output Power [3]
Insulation Resistance at TS, VIO = 500 V
Symbol
VIORM
VPR
VPR
VIOTM
TS
IS, INPUT
PS, OUTPUT
RS
HCPL-7860 HCPL-786J
I - IV
I - III
I - III
I - II
40/85/21
2
891
1670
I - IV
I - IV
I - IV
I - III
40/85/21
2
1414
2652
1425
2262
6000
175
400
600
>109
8000
175
400
600
>109
Unit
Vpeak
Vpeak
Vpeak
Vpeak
°C
mA
mW
W
Notes:
1. Insulation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits within the applica-
tion. Surface Mount Classifications is Class A in accordance with CECC00802.
2. Refer to IEC/EN/DIN EN 60747-5-5 Optoisolator Safety Standard section of the Avago Regulatory Guide to Isolation Circuits, AV02-2041EN for a
detailed description of Method a and Method b partial discharge test profiles.
3. Refer to the following figure for dependence of PS and IS on ambient temperature.
800
700
P S (mW)
IS (mA)
600
500
400
300
200
100
0
0 25 50 75 100 125 150 175 200
TS - CASE TEMPERATURE - oC
5
5 Page 100
90
80
70
60
50
40
30
20
10
0
123
CONVERSION MODE #
Figure 13. Signal Delay vs. Conversion Mode.
4
5
V IN+ (200 mV/DIV.)
OVR1 (200 mV/DIV.)
THR1
(2 V/DIV.)
2 µs/DIV.
Figure 14. Over-Range and Threshold Detect Times.
Application Information
Digital Current Sensing
As shown in Figure 16, using the Isolated 2-chip A/D con-
verter to sense current can be as simple as connecting a
current-sensing resistor, or shunt, to the input and reading
output data through the 3-wire serial output interface.
By choosing the appropriate shunt resistance, any range
of current can be monitored, from less than 1 A to more
than 100 A.
Even better performance can be achieved by fully utilizing
the more advanced features of the Isolated A/D converter,
such as the pre-trigger circuit, which can reduce conver-
sion time to less than 1 µs, the fast over-range detector
for quickly detecting short circuits, different conversion
modes giving various resolution/speed trade-offs, offset
calibration mode to eliminate initial offset from measure-
ments, and an adjustable threshold detector for detecting
non-short circuit overload conditions.
100
90
80
70
60
50
40
30
20
10
01 2 3 4
CONVERSION MODE #
Figure 15. Signal Bandwidth vs. Conversion Mode.
NON-ISOLATED
+5V
5
INPUT
CURRENT
+
R SHUNT
0.02
ISOLATED
+5V
C1
0.1 µF
V DD1
V IN+
V IN-
GND1
V DD2
MCLK
MDAT
GND2
HCPL-7860/
HCPL-786J
Figure 16. Typical Application Circuit.
11
C2
0.1 µF
CCLK
CLAT
CDAT
MCLK1
MDAT1
MCLK2
MDAT2
GND
V DD
CHAN
SCLK
SDAT
CS
THR1
OVR1
RESET
HCPL-0872
3-WIRE
SERIAL
INTERFACE
+ C3
10 µF
11 Page |
Páginas | Total 17 Páginas | |
PDF Descargar | [ Datasheet HCPL-7860.PDF ] |
Número de pieza | Descripción | Fabricantes |
HCPL-7860 | Isolated 15-bit A/D Converter | Agilent(Hewlett-Packard) |
HCPL-7860 | Isolated 15-bit A/D Converter | Hewlett-Packard |
HCPL-7860 | Optically Isolated Sigma-Delta (S-D) Modulator | Avago |
HCPL-786J | Optically Isolated Sigma-Delta Modulator | Agilent |
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