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UC3837 の電気的特性と機能

UC3837のメーカーはUnisonic Technologiesです、この部品の機能は「LOW COST POWER-SAVING MODE PWM CONTROLLER」です。


製品の詳細 ( Datasheet PDF )

部品番号 UC3837
部品説明 LOW COST POWER-SAVING MODE PWM CONTROLLER
メーカ Unisonic Technologies
ロゴ Unisonic Technologies ロゴ 




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UC3837 Datasheet, UC3837 PDF,ピン配置, 機能
UNISONIC TECHNOLOGIES CO., LTD
UC3837
Preliminary
LINEAR INTEGRATED CIRCUIT
LOW COST POWER-SAVING
MODE PWM CONTROLLER
FOR FLYBACK CONVERTERS
DESCRIPTION
The UC3837 is a high performance current mode PWM
controller ideally suited for low standby power. Low VDD startup
current make the power reliable on startup design and a large
value resistor could be used in the startup circuit to minimize the
standby power. At no load condition, the IC operates in
power-saving mode for lower standby power, decreasing frequency
for Higher conversion efficiency at light load condition.
The internal slope compensation improves system stability at
high PWM duty cycle output. Leading-edge blanking on current
sense input removes the signal glitch, which offering minimal
external component count in the design. Excellent EMI
performance is achieved with UTC proprietary frequency hopping
technique (ZL201020615247.1) together with soft driver control.
Audio noise is eliminated due to switch frequency more than 20kHz
during operation.
The UC3837 has such applications as: battery charger, power
adaptor, set-top box power supplies, ink jet printers, open-frame
SMPS.
54
6
1 23
SOT-26
FEATURES
* UTC proprietary frequency hopping technology for Improved EMI * Programming BNO for higher security
performance.
* Fixed switch frequency 65kHz
* Power-saving mode for high light-load and standby efficiency
* Gate output voltage clamped at 15V
* Soft Start
* Low start-up current
* Dynamic peak current limiting for constant output power
* Cycle-by-cycle Current Limiting
* Built-in synchronized slope compensation
* Under voltage lockout (UVLO)
* OTP,OLP,OVP and VDD clamp for higher security
* Few external components required
ORDERING INFORMATION
Ordering Number
UC3837G-AG6-R
Package
SOT-26
Packing
Tape Reel
UC3837G-AG6-R
(1)Packing Type
(2)Package Type
(3)Green Package
(1) R: Tape Reel
(2) AG6: SOT-26
(3) G: Halogen Free and Lead Freee
www.unisonic.com.tw
Copyright © 2015 Unisonic Technologies Co., Ltd
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UC3837 pdf, ピン配列
UC3837
BLOCK DIAGRAM
Preliminary
LINEAR INTEGRATED CIRCUIT
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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QW-R103-069.B


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UC3837 電子部品, 半導体
UC3837
Preliminary
LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION (Cont.)
Frequency Hopping For EMI Improvement
The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to
set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd
oscillator. The relation between the first oscillator and the 2nd oscillator as followed Fig.2. So the tone energy is
evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design
in meeting stringent EMI requirement.
Fig.2 Frequency Hopping
Built-in Slope Compensation
Built-in slope compensation circuit greatly improves the close loop stability at CCM and prevents the
sub-harmonic oscillation.
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid
premature termination of the switching pulse, a 400ns leading-edge blanking time is built in. Conventional RC
filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and it cannot
switch off the gate driver.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around 0.8V, the output
GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional
current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is
adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor RVIN, a
higher line voltage will generate higher VIN current into the VIN pin. The threshold voltage is decreased if the VIN
current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the
total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal
compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC.
Under Voltage Lockout (UVLO)
The turn-on and turn-off thresholds of the UC3837 are fixed internally at VTHD(ON)/VDD(MIN) During start-up, the
hold-up capacitor must be charged to VTHD(ON) through the start-up resistor, so that the UC3837 will be enabled. The
hold-up capacitor will continue to supply VDD until power can be delivered from the auxiliary winding of the main
transformer. VDD must not drop below VDD(MIN) during this start-up process. This UVLO hysteresis window ensures
that hold-up capacitor will be adequate to supply VDD during start-up.
Gate Output
The UC3837 output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize heat
dissipation, increase efficiency, and enhance reliability. A good tradeoff is achieved through dead time control. The
low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal 15V
clamp is added for MOSFET gate protection at higher than expected VDD input.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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