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PDF AP3585C Data sheet ( Hoja de datos )
| Número de pieza | AP3585C | |
| Descripción | SINGLE PHASE SYNCHRONOUS BUCK PWM CONTROLLER | |
| Fabricantes | Diodes Incorporated | |
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A Product Line of
Diodes Incorporated
AP3585A/B/C
SINGLE PHASE SYNCHRONOUS BUCK PWM CONTROLLER
Description
Pin Assignments
The AP3585A/B/C is a compact synchronous-rectified buck controller
specifically designed to operate from 4.5V to 13.2V supply voltage
and deliver high-quality output voltage as low as 0.8V (AP3585A) or
0.6V (AP3585B/C). This SO-8EP device operates at fixed
300kHz/200kHz frequency and provides an optimal level of
integration to reduce size and cost of the power supply.
This controller integrates internal MOSFET drivers that support
12V+12V bootstrapped voltage for high- efficiency power conversion.
The bootstrap diode is built-in to simplify the circuit design and
minimize external part count.
This controller provides single feedback loop, voltage-mode control
with fast transient response. The error amplifier features a 10MHz
gain-bandwidth product and 6V/μs slew rate which enables high
converter bandwidth for fast transient performance.
Other features include internal soft-start, under voltage protection,
over current protection and shutdown function. With afore mentioned
functions, this part provides customers a compact, high efficiency,
well-protected and cost-effective solution.
The AP3585A/B/C is available in SO-8 and SO-8EP packages.
Features
Supply Voltage: 4.5V to 13.2V
VIN Input Range: 3.3V to 12V
0.8V/0.6V to 80% of VIN Output Range
Internal Reference: 0.8V/0.6V
Simple Single-loop Control
Voltage-mode PWM Control
Duty Cycle: 0% to 80%
Fast Transient Response
10MHz High-bandwidth Error Amplifier with 6V/μs Slew Rate
Fixed Oscillator Frequency: 300kHz/200kHz
Lossless, Programmable Over Current Protection
(Uses Lower MOSFET RDS(ON))
Start-up into Pre-biased Load
Built-in Thermal Shutdown
Built-in Soft-start
Over Current Protection
Over Voltage Protection
Under Voltage Protection
Integrated Boot Diode
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
(Top View)
BOOT 1
UGATE 2
GND 3
LGATE/OCSET 4
8 PHASE
7 COMP/EN
6 FB
5 VCC
(SO-8/ M Package)
(Top View)
BOOT 1
UGATE 2
GND 3
LGATE/OCSET 4
Exposed
Pad
9
8 PHASE
7 COMP/EN
6 FB
5 VCC
(SO-8EP/ MP Package)
Applications
Subsystem Power Supplies
PCI, AGP, Graphics Cards, Digital TV
SSTL-2 and DDR/2/3 SDRAM Bus Termination Supply
Cable Modems, Set Top Boxes, and DSL Modems
Industrial Power Supplies and General Purpose Supplies
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
AP3585A/B/C
Document number: DS36819 Rev. 1 - 2
1 of 18
www.diodes.com
January 2014
© Diodes Incorporated
1 page  
A Product Line of
Diodes Incorporated
AP3585A/B/C
Electrical Characteristics (Cont. VCC = 12V, TA = +25oC, unless otherwise specified.)
Symbol
Parameter
Conditions
POWER ON RESET
VPOR
VPOR_HYS
VCC Rising Threshold
VCC Threshold Hysteresis
VCC Rising
–
ERROR AMPLIFIER
GDC_OL
GBW
SR
Open Loop DC Gain
Gain-bandwidth Product
Slew Rate
–
–
–
–
Transconductance
–
–
Output Source Current
VFB < VREF
–
Output Sink Current
VFB > VREF
PWM CONTROLLER GATE DRIVERS
IUG_SRC
Upper Gate Source Current
IUG_SNK
RUGATE
ILG_SRC
ILG_SNK
RLGATE
–
–
–
Upper Gate Sink Current
Upper Gate Sink
Resistance
Lower Gate Source Current
Lower Gate Sink Current
Lower Gate Sink
Resistance
PHASE Falling to LGATE
Rising Delay
LGATE Falling to UGATE
Rising Delay
Minimum Duty Cycle
VBOOT-VPHASE = 12V,
VBOOT-VUGATE = 6V
VBOOT-VPHASE = 12V,
VBOOT-VUGATE = 6V
50mA Source Current
VCC-VLGATE = 6V
VLGATE = 6V
50mA Source Current
VPHASE < 1.2V to VLGATE >
1.2V
VLGATE < 1.2V to
(VUGATE-VPHASE) > 1.2V
–
–
Maximum Duty Cycle
–
OSCILLATOR
AP3585A/B
fOSC
Oscillator Frequency
AP3585C
∆VOSC
REFERENCE VOLTAGE
VFB
Ramp Amplitude
Feedback Voltage
–
AP3585A
AP3585B/C
IFB
PROTECTION
VFB_UVP
VFB_OVP
Feedback Bias Current
Under Voltage Protection
Over Voltage Protection
VFB = 5V
–
AP3585A
AP3585B/C
IOCSET
VOCP_MAX
OC Current Source
Built-in Maximum OCP
Voltage
–
–
AP3585A
tSS
VCOMP/EN
TOTSD
THYS
Soft-start Interval
Enable Threshold
Thermal Shutdown
Thermal Shutdown
Hysteresis
AP3585B
AP3585C
–
–
–
AP3585A/B/C
Document number: DS36819 Rev. 1 - 2
5 of 18
www.diodes.com
Min
4.0
–
55
–
3
–
80
80
–
–
–
–
–
–
–
–
–
75
270
180
–
0.788
0.591
–
0.3
–
–
9
–
–
–
–
0.25
–
–
Typ
4.2
500
70
10
6
800
120
120
-1.0
1.5
2
-1
1.5
1
30
30
0
82
300
200
1.4
0.8
0.6
10
0.4
1.1
0.8
10
0.375
2
1.5
2.4
0.30
+160
+20
Max
4.4
–
–
–
–
1100
–
–
Unit
V
mV
dB
MHz
V/µs
µA/V
µA
µA
–A
–A
4Ω
–A
–A
2Ω
– ns
– ns
–%
89 %
330
220
–
0.812
0.609
50
kHz
VP-P
V
V
nA
0.5
–
–
11
–
–
–
–
0.35
–
–
V
V
µA
V
ms
V
ºC
ºC
January 2014
© Diodes Incorporated
5 Page 
Functional Descriptions (Cont.)
A Product Line of
Diodes Incorporated
AP3585A/B/C
Thermal Shutdown
If the junction temperature of the device reaches the thermal shutdown limit of +160°C, the PWM and the oscillator are turned off and UGATE and
LGATE are driven low, turning off both MOSFETs. When the junction cools to the required level (+140°C nominal), the PWM initiates soft start as
during a normal power-up cycle.
Output Voltage Selection
The output voltage can be programmed to any level between the 0.8V (for AP3585A) internal reference (0.6V for AP3585B/C) to the 80% of VIN
supply. The lower limitation of output voltage is caused by the internal reference. The upper limitation of the output voltage is caused by the
maximum available duty cycle (80%). This is to leave enough time for over-current detection. Output voltage out of this range is not allowed.
A voltage divider sets the output voltage (Refer to the typical application circuit). In real applications, choose R1 in 100Ω to 10kΩ range and
choose appropriate R2 according to the desired output voltage.
VOUT
0.8V
R1 R2
R2
AP3585A
VOUT
0.6V
R1 R2
R2
AP3585B/C
PCB Layout Considerations
High speed switching and relatively large peak currents in a synchronous-rectified buck converter make the PCB layout a very important part of
design. Switching current from one power device to another can generate voltage spikes across the impedances of the interconnecting bond wires
and circuit traces. The voltage spikes can degrade efficiency and radiate noise, which results in over-voltage stress on devices. Careful
component placement layout a printed circuit design can minimize the voltage spikes induced in the converter.
Follow the below layout guidelines for optimal performance of AP3585A/B/C.
1. The turn-off transition of the upper MOSFET prior to turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops
flowing in the upper MOSFET and is picked up by the low side MOSFET. Any inductance in the switched path generates a large voltage spike
during the switching interval. Careful component selections, layout of the critical components, and use shorter and wider PCB traces help in
minimizing the magnitude of voltage spikes.
2. The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic
decoupling capacitors, close to the power switches. Place the output inductor and output capacitors between the MOSFETs and the load. Also
locate the PWM controller near MOSFETs.
3. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Use an immediate via to connect the component to
ground plane including GND of AP3585A/B/C.
4. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support
the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node.
5. The PHASE node is subject to very high dV/dt voltages. Stray capacitance between this island and the surrounding circuitry tend to induce
current spike and capacitive noise coupling. Keep the sensitive circuit away from the PHASE node and keep the PCB area small to limit the
capacitive coupling. However, the PCB area should be kept moderate since it also acts as main heat convection path of the lower MOSFET.
6. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to
carry 2A peak currents.
AP3585A/B/C
Document number: DS36819 Rev. 1 - 2
11 of 18
www.diodes.com
January 2014
© Diodes Incorporated
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet AP3585C.PDF ] | |
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