RK2918 Datasheet
Rev 1.0
Table Index
Table 2-1 RK2908 Pin Number Order Information................................................ 25
Table 2-2 RK2918 Power/Ground IO informations................................................ 30
Table 2-3 RK2908 IO descriptions ..................................................................... 34
Table 2-4 RK2918 IO function description list ..................................................... 49
Table 2-5 RK2918 IO Type List ......................................................................... 56
Table 3-1 RK2918 absolute maximum ratings ..................................................... 60
Table 3-2 RK2918 recommended operating conditions ......................................... 60
Table 3-3 RK2918 DC Characteristics ................................................................ 61
Table 3-4 RK2918 Electrical Characteristics for Digital General IO.......................... 62
Table 3-5 RK2918 Electrical Characteristics for PLL.............................................. 63
Table 3-6 RK2918 Electrical Characteristics for SAR-ADC ...................................... 64
Table 3-7 RK2918 Electrical Characteristics for USB OTG/Host2.0 Interface............. 64
Table 3-8 RK2918 Electrical Characteristics for USB Host1.1 Interface.................... 65
Table 3-9 RK2918 Electrical Characteristics for DDR IO ........................................ 65
Table 3-10 RK2918 Electrical Characteristics for eFuse......................................... 65
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RK2918 Datasheet
Rev 1.0
non-secure
Support trustzone technology and programmable secure state for each DMA
channel
DMAC1 features:
7 channels totally
20 hardware request from peripherals
4 interrupt output
Not support trustzone technology
Security system
Support trustzone technology for the following components inside RK2918
Cortex-A8, support security and non-security mode, switch by software
Interrupt controller, support some registers and dedicated interrupt sources
to work only in security mode
DMAC0, support some dedicated channels work only in security mode
eFuse, only accessed by Cortex-A8 in security mode
Internal memory , part of space is addressed only in security mode, detailed
size is software-programmable together with TZMA(trustzone memory
adapter) and TZPC(trustzone protection controller)
1.1.6 Video CODEC
Shared internal memory and bus interface for video decoder and encoder②
Video Decoder
Real-time video decoder of MPEG-1, MPEG-2, MPEG-4,H.263, H.264 , AVS ,
VC-1 , RV , VP8 , Sorenson Spark
Error detection and concealment support for all video formats
Output data structure after decoder is YCbCr 4:2:0 semi-planar to have more
efficient bus usage, For H.264, YCbCr 4:0:0(monochrome) is also supported
Minimum image size is 48x48 for all video formats
H.264 up to HP level 4.2 : 1080p@60fps (1920x1088)③
MPEG-4 up to ASP level 5 : 1080p@60fps (1920x1088)
MPEG-2 up to MP
: 1080p@60fps (1920x1088)
MPEG-1 up to MP
: 1080p@60fps (1920x1088)
H.263
: 576p@60fps (720x576)
Sorenson Spark
: 1080p@60fps (1920x1088)
VC-1 up to AP level 3
: 1080p@30fps (1920x1088)
RV8/RV9/RV10
: 1080p@60fps (1920x1088)
VP6/VP7/VP8
: 1080p@60fps (1920x1088)
AVS
: 1080p@60fps (1920x1088)
For AVS, 4:4:4 sampling not supported
For H.264, Image cropping not supported
For MPEG-4,GMC(global motion compensation) not supported
For VC-1, upscaling and range mapping are supported in image post-processor
For MPEG-4 SP/H.263/Sorenson spark, using a modified H.264 in-loop filter to
implement deblocking filter in post-processor unit
Video Encoder
Only support I and P slices, not B slices
Entropy encoding is CAVLC in BP and CABAC in MP
Support error resilience based on constrained intra prediction and slices
Maximum MV length is +/- 14 pixels in vertical direction and +/-30 pixels in
horizontal direction
Motion vector pixel accuracy is up to 1/4 pixels in 720p resolution and 1/2 pixels
in 1080p resolution
12 intra prediction modes
Number of reference frames is 1
Maximum number of slice groups is 1
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