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PDF SH79F161A Data sheet ( Hoja de datos )

Número de pieza SH79F161A
Descripción Enhanced 8051 Microcontroller
Fabricantes SINO WEALTH 
Logotipo SINO WEALTH Logotipo



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SH79F161A
Enhanced 8051 Microcontroller with 10bit ADC
1. Features
8bits micro-controller with Pipe-line structured 8051
compatible instruction set
Flash ROM: 16K Bytes
RAM: internal 256 Bytes, external 512 Bytes
EEPROM-like: 2K Bytes
Operation Voltage:
fOSC = 400k - 16MHz, VDD = 3.6V - 5.5V
Oscillator (code option):
- Crystal oscillator: 400kHz - 16MHz
- Ceramic oscillator: 400kHz - 16MHz
- Internal RC: 12.3MHz
30 CMOS bi-directional I/O pins
Built-in pull-up resistor for input pin
Three 16-bit timer/counters T0, T1and T2
One 12-bit PWM
Two 8-bit PWM
Powerful interrupt sources:
- Timer0, 1, 2
- INT0, 1, 2, 3
- INT40-7
- ADC, EUART, SPI, PWM
EUART
SPI interface (Master/Slave Mode)
8channels 10-bits Analog Digital Converter (ADC),
with comparator function built-in
Buzzer
Low Voltage Reset (LVR) function (enabled by
code option)
- LVR voltage level 1: 4.1V
- LVR voltage level 2: 3.7V
CPU Machine cycle: 1 oscillator clock
Watch Dog Timer (WDT)
Warm-up Timer
Support Low power operation modes:
- Idle Mode
- Power-Down Mode
Flash Type
Package:
- LQFP32
- QFP44
- LQFP44
2. General Description
The SH79F161A is a high performance 8051 compatible micro-controller, regard to its build-in Pipe-line instruction fetch
structure, that helps the SH79F161A can perform more fast operation speed and higher calculation performance, if compare
SH79F161A with standard 8051 at same clock speed.
The SH79F161A retains most features of the standard 8051. These features include internal 256 bytes RAM, UART and
Int0-3.In addition, the SH79F161A provides external 512 bytes RAM, It also contains 16K bytes Flash memory block both for
program and data. Also the ADC and PWM timer functions are incorporated in SH79F161A.
For high reliability and low cost issues, the SH79F161A builds in Watchdog Timer, Low Voltage Reset function. And
SH79F161A also supports two power saving modes to reduce power consumption.
1 V2.2

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SH79F161A pdf
SH79F161A
Table 4.1 Pin Function
Pin No.
32 LQFP 44 QFP 44 LQFP
Pin Name
28 39 39 INT47/P1.0
29 40 40 INT44/P1.1
P1.0
P1.1
Default Function
30 41 41 TDO/INT43/AN4/P1.2
31 42 42 TMS/INT42/AN5/P1.3
32 43 43 TDI/INT41/AN6/P1.4
P1.2
P1.3
P1.4
1 44 44 TCK/INT40/AN7/P1.5
2 5 5 T0/P1.6
3
1
1
————
RST/P1.7
6 10 10 VDD
7 11 11 VSS
5 12 12 XTAL1/P3.4
P1.5
P1.6
Reset pin or P1.7 (code option)
-----
-----
P3.4 or osc input pin (code option)
4 13 13 XTAL2/P3.3
8 14 14 T2EX/P3.2
9 15 15 T2/INT0/P3.1
10
16
16
———
FLT/ SS /P3.0
11 17 17 P3.5
12 18 18 BZ/SCK/P2.0
P3.3 or osc output pin (code option)
P3.2
P3.1
P3.0
P3.5
P2.0
13 19 19 TXD/MISO/P2.1
14 20 20 RXD/MOSI/P2.2
15 21 21 PWM2/P2.3
P2.1
P2.2
P2.3
16 22 22 PWM0/P2.4
17 23 23 PWM1/P2.5
18 27 27 PWM01/INT45/P2.6
P2.4
P2.5
P2.6
19 24 24 PWM11/INT46/P2.7
20 31 31 PWM21/INT1/P0.7
21 29 29 T1/P0.6
P2.7
P0.7
P0.6
*22 *33 *33 AN3/P0.5
*23 *34 *34 AN2/P0.4
*24 *35 *35 AN1/P0.3
P0.5
P0.4
P0.3
*25 *36 *36 AN0/P0.2
26 37 37 INT3/P0.1
27 38 38 INT2/P0.0
P0.2
P0.1
P0.0
*Note:
P0.2, P0.3, P0.4, P0.5 are configured as N-channel open drain I/O
The out most pin function has the highest priority, and the inner most pin function has the lowest priority (Refer to Pin
Configuration Diagram. This means when one pin is occupied by a higher priority function (if enabled) cannot be used as the
lower priority functional pin, even when the lower priority function is also enabled. Until the higher priority function is closed by
software, can the corresponding pin be released for the lower priority function use.
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SH79F161A arduino
SH79F161A
Table 6.7 Port SFRs
Mnem
P0
Add
80H
Name
8-bit Port 0
POR/WDT/LVR
/PIN Reset Value
00000000
Bit7
P0.7
P1 90H
8-bit Port 1
00000000
P1.7
P2 A0H
8-bit Port 2
00000000
P2.7
P3 B0H
6-bit Port 3
--000000
-
P0CR E1H Port0 input/output direction control 00000000
P0CR.7
P1CR E2H Port1 input/output direction control 00000000
P1CR.7
P2CR E3H Port2 input/output direction control 00000000
P2CR.7
P3CR E4H Port3 input/output direction control --000000
-
P0PCR E9H Internal pull-high enable for Port0 00000000
P0PCR.7
P1PCR EAH Internal pull-high enable for Port1 00000000
P1PCR.7
P2PCR EBH Internal pull-high enable for Port2 00000000
P2PCR.7
P3PCR ECH Internal pull-high enable for Port3
--000000
-
P0OS EFH
Output mode control
--0000--
-
Bit6
P0.6
P1.6
P2.6
-
P0CR.6
P1CR.6
P2CR.6
-
P0PCR.6
P1PCR.6
P2PCR.6
-
-
Bit5
P0.5
P1.5
P2.5
P3.5
P0CR.5
P1CR.5
P2CR.5
P3CR.5
P0PCR.5
P1PCR.5
P2PCR.5
P3PCR.5
P05OS
Bit4
P0.4
P1.4
P2.4
P3.4
P0CR.4
P1CR.4
P2CR.4
P3CR.4
P0PCR.4
P1PCR.4
P2PCR.4
P3PCR.4
P04OS
Bit3
P0.3
P1.3
P2.3
P3.3
P0CR.3
P1CR.3
P2CR.3
P3CR.3
P0PCR.3
P1PCR.3
P2PCR.3
P3PCR.3
P03OS
Bit2
P0.2
P1.2
P2.2
P3.2
P0CR.2
P1CR.2
P2CR.2
P3CR.2
P0PCR.2
P1PCR.2
P2PCR.2
P3PCR.2
P02OS
Bit1
P0.1
P1.1
P2.1
P3.1
P0CR.1
P1CR.1
P2CR.1
P3CR.1
P0PCR.1
P1PCR.1
P2PCR.1
P3PCR.1
-
Bit0
P0.0
P1.0
P2.0
P3.0
P0CR.0
P1CR.0
P2CR.0
P3CR.0
P0PCR.0
P1PCR.0
P2PCR.0
P3PCR.0
-
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