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PDF ISL71841SEH Data sheet ( Hoja de datos )
| Número de pieza | ISL71841SEH | |
| Descripción | Radiation Hardened 30V 32-Channel Analog Multiplexer | |
| Fabricantes | Intersil | |
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DATASHEET
Radiation Hardened 30V 32-Channel Analog
Multiplexer
ISL71841SEH
The ISL71841SEH is a radiation hardened, 32-Channel high
ESD protected multiplexer that is fabricated using Intersil’s
proprietary P6SOI (Silicon On Insulator) process technology to
mitigate single-event effects. It operates with a dual supply
voltage ranging from ±10.8V to ±16.5V. It has a 5-bit address
plus an enable pin that can be driven with adjustable logic
thresholds to conveniently select 1 of 32 available channels.
An inactive channel is separated from an active channel by a
high impedance, which inhibits any interaction between them.
The ISL71841SEH’s low rON allows for improved signal
integrity and reduced power losses. The ISL71841SEH is also
designed for cold sparing making it excellent for high reliability
applications that have redundancy requirements. It is
designed to provide a high impedance to the analog source in
a powered off condition, making it easy to add additional
backup devices without loading signal sources. The
ISL71841SEH also incorporates input analog overvoltage
protection, which will disable the switch to protect downstream
devices.
The ISL71841SEH is available in a 48 Ld CQFP or die form and
operates across the extended temperature range of -55°C to
+125°C.
There is also a 16-Channel version available called the
ISL71840SEH offered in a 28 Ld CDFP, please refer to the
ISL71840SEH datasheet for more information. For a list of
differences please refer to Table 1 on page 3.
Related Literature
• UG037, “ISL71841SEHEV1Z Evaluation Board User Guide”
• TR007, “Single Event Effects (SEE) Testing of the
ISL71841SEH 32:1 30V Multiplexer”
Features
• DLA SMD# 5962-15220
• Fabricated using P6SOI process technology
- Provides latch-up immunity
• ESD protection 8kV (HBM)
• Rail-to-rail operation
• Overvoltage protection
• Low rON. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <500Ω (typ)
• Flexible split rail operation
- Positive supply above GND (V+) . . . . . . . +10.8V to +16.5V
- Negative supply below GND (V-) . . . . . . . . -10.8V to -16.5V
• Adjustable logic threshold control with VREF pin
• Cold sparing capable (from ground). . . . . . . . . . . . . . . . .±25V
• Analog overvoltage range (from ground) . . . . . . . . . . . . .±35V
• Off switch leakage . . . . . . . . . . . . . . . . . . . . . . . . 100nA (max)
• Transition times (tR, tF) . . . . . . . . . . . . . . . . . . . . . . 500ns (typ)
• Break-before-make switching
• Grounded metal lid (internally connected)
• Operating temperature range. . . . . . . . . . . .-55°C to +125°C
• Radiation tolerance
- High dose rate (50-300rad(Si)/s). . . . . . . . . . . 100krad(Si)
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . 100krad(Si)*
- SEB LETTH . . . . . . . . . . . . . . . . . . . . . . . . . 86.4MeV•cm2/mg
* Product capability established by initial characterization. All
subsequent lots are assurance tested to 50krad
(0.01rad(Si)/s) wafer-by-wafer.
ISL71841SEH
IN01
IN02
IN03
.
.
.
IN32
OUT
ADC
5
ADDRESS
EN
FIGURE 1. TYPICAL APPLICATION
June 11, 2015
FN8735.0
1
600
500
400 +25°C
+125°C
300
200
100
-55°C
0
-20 -15 -10 -5.0 0 5.0 10 15 20
SWITCH INPUT VOLTAGE (V)
FIGURE 2. rDS(ON) vs POWER SUPPLY ACROSS SWITCH INPUT
COMMON MODE VOLTAGE AT +25°C
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL71841SEH
Absolute Maximum Ratings
Positive Supply Voltage above GND (V+) (Note 5). . . . . . . . . . . . . . . . . +20V
Negative Supply Voltage below GND (V-) (Note 5) . . . . . . . . . . . . . . . . .-20V
Maximum Supply Voltage Differential (V+ to V-) (Note 5) . . . . . . . . . . . 40V
Analog Input Voltage (INx)
From GND (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35V
Digital Input Voltage Range (EN, Ax) . . . . . . . . . . . . . . . . . . . . . . . . GND to V+
VREF to GND (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16.5V
ESD Tolerance
Human Body Model (Tested per MIL-PRF-883 3015.7). . . . . . . . . . . 8kV
Charged Device Model (Tested per MIL-PRF-883 3015.7) . . . . . . . 250V
Machine Model (Tested per MIL-PRF-883 3015.7) . . . . . . . . . . . . . 250V
Thermal Information
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
48 Ld CQFP (Notes 3, 4) . . . . . . . . . . . . . . .
50
2
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Recommended Operating Conditions
Ambient Operating Temperature Range . . . . . . . . . . . . . .-55°C to +125°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+150°C
Positive Supply Voltage Above GND (V+) . . . . . . . . . . . . . +10.8V to +16.5V
Negative Supply Voltage Below GND (V-) . . . . . . . . . . . . . . .-10.8V to -16.5V
Supply Voltage Differential (V+ to V-) . . . . . . . . . . . . . . . . . . . . 21.6V to 33V
VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. For JC, the “case temp” location is the center of the package underside.
5. Tested in a heavy ion environment at LET = 86.3 MeV•cm2/mg at +125°C.
Electrical Specifications (15V) V+ = 15V, V- = -15V, VAH = 4.0V, VAL = 0.8V, VREF = VEN = 5.0V, TA= +25°C, unless otherwise
noted. Boldface limits apply across the operating temperature range, -55°C to +125°C or across a total ionizing dose of 300krad(Si) with exposure
of a high dose rate of 50 to 300krad(Si)/s or a total ionizing dose of 50krad(Si) with exposure at a low dose rate of <10mrad(Si)/s.
PARAMETER
DESCRIPTION
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNIT
VS
rON
ΔrON
RFLAT(ON)
IS(OFF)
Analog Input Signal Range
Channel ON-resistance
rON Match Between Channels
ON-resistance Flatness
Switch Off Leakage
V± = ±15.0V, ±16.5V
IOUT = -1mA, VIN = +5V, -5V
V± = ±15.0V, ±16.5V
IOUT = -1mA, VIN = V+, V-
VIN = +5V, -5V; IOUT = -1mA
VIN = +5V, -5V
VIN = V+ - 5V, V± = ±16.5V
All unused inputs are tied to V- + 5V
V- - V+
- - 500
- - 700
- 10
--
-10 -
20
25
10
V
Ω
Ω
Ω
Ω
nA
Post radiation
-100
-
100
nA
VIN = V- + 5V, V± = ±16.5V
All other inputs = V+ - 5V
TA = +25°C, -55°C
TA = +125°C
Post radiation
-10
-20
-100
-
-
-
10
20
100
nA
nA
nA
IS(OFF) POWER OFF Switch Off Leakage with Device
Powered Off
VIN = +25V, V± = VEN = VA = VREF = 0V
TA = +25°C, V± = 0V
TA = -55°C, +125°C
Post radiation
-10
-10
-100
-
-
-
10
80
100
nA
nA
nA
VIN = -25V, V± = VEN = VA = VREF = 0V
TA = +25°C, V± = 0V
TA = -55°C, +125°C
Post radiation
-10
-80
-100
-
-
-
10
10
100
nA
nA
nA
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5
FN8735.0
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ISL71841SEH
Timing Diagrams
+4.0V
+0.8V
ISL71841SEH
A4 IN01
A3
A2
IN02-IN31
50Ω
A1
A0
IN32
+15V, 0V
0V, +15V
+0.8V EN
OUT
10kΩ
50pF
FIGURE 4. ADDRESS TIME TO OUTPUT TEST CIRCUIT
ISL71841SEH
A4 IN01
A3
A2
IN02-IN32
A1
A0
+10V
+4.0V
+0.8V
EN
50Ω
OUT
1kΩ 50pF
FIGURE 6. TIME TO ENABLE/DISABLE OUTPUT TEST CIRCUIT
+4.0V
+0.8V
50Ω
ISL71841SEH
A4 IN01
A3
A2
IN02-IN31
A1 IN32
A0
+5V
+0.8V EN
OUT
1kΩ
VOUT
50pF
4V
“11111”
ADDRESS
50%
50%
0.8V
15V
OUTPUT
“00000”
tAHL
50%
tALH
50%
0V
FIGURE 5. ADDRESS TIME TO OUTPUT DIAGRAM
4V
ENABLE
50%
50%
0.8V
10V
OUTPUT
tENABLE
50%
tDISABLE
50%
0V
FIGURE 7. TIME TO ENABLE/DISABLE OUTPUT DIAGRAM
4V
ADDRESS
0.8V
5V
OUT
50%
FIGURE 8. BREAK-BEFORE-MAKE TEST CIRCUIT
0V tBBM
FIGURE 9. BREAK-BEFORE-MAKE DIAGRAM
+4.0V
+0.8V
ISL71841SEH
A4 IN01
A3
A2
IN02-IN31
50Ω
A1
A0
IN32
+0.8V EN
OUT
0V
VOUT
100pF
FIGURE 10. CHARGE INJECTION TEST CIRCUIT
4V
ADDRESS
0.8V
15V
OUT
0V
Q = 100pF * ΔVOUT
ΔVOUT
FIGURE 11. CHARGE INJECTION DIAGRAM
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| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet ISL71841SEH.PDF ] | |
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