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PDF TL074 Data sheet ( Hoja de datos )
| Número de pieza | TL074 | |
| Descripción | LOW NOISE QUAD J-FET OPERATIONAL AMPLIFIER | |
| Fabricantes | Unisonic Technologies | |
| Logotipo |  |
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UNISONIC TECHNOLOGIES CO., LTD
TL074
LINEAR INTEGRATED CIRCUIT
LOW NOISE QUAD J-FET
OPERATIONAL AMPLIFIER
DESCRIPTION
The UTC TL074 is a high speed J-FET input quad
operational amplifier. It incorporates well matched, high
voltage J-FET and bipolar transistors in a monolithic
integrated circuit. The device features high slew rates, low
input bias and offset current and low offset voltage
temperature coefficient.
FEATURES
*Low power consumption
*Wide common-mode (up to Vcc+ ) and differential voltage
range
*Low input bias and offset current
*Low noise eN = 15nV / Hz(typ)
*Output short-circuit protection
*High input impedance J-FET input stage
*Low harmonic distortion:0.01%(typ)
*Internal frequency compensation
*Latch up free operation
*High slewrate:13V/μs(typ)
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
TL074L-D14-T
TL074G-D14-T
TL074L-S14-R
TL074G-S14-R
Package
DIP-14
SOP-14
Packing
Tube
Tape Reel
www.unisonic.com.tw
Copyright © 2014 Unisonic Technologies Co., Ltd
1 of 10
QW-R105-005.H
1 page  
TL074
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS
(Vcc=±15V, TA=25C, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
Input Offset Voltage
VI(OFF)
Rs=50
TA=25C
TMIN≤TA≤TMAX
3 6 mV
7 mV
Temperature Coefficient of Input
Offset Voltage
ΔVI(OFF)
Rs=50
10 V/C
Input Offset Current (Note)
Input Bias Current (Note)
Input Common Mode Voltage
II(OFF)
II(BIAS)
VI(CM)
TA=25C
TMIN≤TA≤TMAX
TA=25C
TMIN≤TA≤TMAX
5 100
4
20 200
20
±11 -12~+15
pA
nA
pA
nA
V
Output Voltage Swing
VO(SW)
RL=2k
RL=10k
RL=2k
RL=10k
TA=25C
TMIN≤TA≤TMAX
10 12
12 13.5
10
12
V
V
V
V
Large Signal Voltage Gain
GV
RL=10k, TA=25C
VOUT=±10V TMIN≤TA≤T MAX
50 200
25
V/mV
V/mV
Gain Bandwidth Product
Input Resistance
GBW
RIN
RL=10k, CL=100pF
23
1012
MHz
Common Mode Rejection Ratio
CMR
RS=50
TA=25C
TMIN≤TA≤T MAX
80 86
80
dB
dB
Supply Voltage Rejection Ratio
SVR
RS=50
TA=25C
TMIN≤TA≤T MAX
80 86
80
dB
dB
Supply Current
ICC
No Load
TA=25C
TMIN≤TA≤T MAX
1.4 2.5 mA
2.5 mA
Channel Separation
V01/V02 Gv=100
120 dB
Output Short-circuit Current
Slew Rate
IO(SC)
TA=25C
TMIN≤TA≤T MAX
10 40 60 mA
10 60 mA
SR
VIN=10V, RL=2k, CL=100pF,
unity gain
8
13
V/s
Rise Time
tR
VIN=20mV, RL=2k, CL=100pF,
unity gain
0.1
s
Overshoot Factor
Kov
VIN=20mV, RL=2k, CL=100pF,
unity gain
10
%
Total Harmonic Distortion
Phase Margin
THD
Gv=20dB, f=1kHz, RL=2k,
CL=100pF, VOUT=2Vpp)
0.01 %
45 Deg.
Equivalent Input Noise Voltage
eN RS=100, f=1KHz
15
Note: The Input bias currents are junction leakage currents, which approximately double for every 10C increase in
the junction temperature.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5 of 10
QW-R105-005. H
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet TL074.PDF ] | |
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