DataSheet.jp

HCPL-7720 の電気的特性と機能

HCPL-7720のメーカーはAvagoです、この部品の機能は「CMOS Optocoupler」です。


製品の詳細 ( Datasheet PDF )

部品番号 HCPL-7720
部品説明 CMOS Optocoupler
メーカ Avago
ロゴ Avago ロゴ 




このページの下部にプレビューとHCPL-7720ダウンロード(pdfファイル)リンクがあります。

Total 19 pages

No Preview Available !

HCPL-7720 Datasheet, HCPL-7720 PDF,ピン配置, 機能
HCPL-0720/7720/0721/7721
40 ns Propagation Delay, CMOS Optocoupler
Data Sheet
Lead (Pb) Free
RcoomHSpl6iafnutlly
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
Available in either an 8-pin DIP or SO-8 package style
respectively, the HCPL-772X or HCPL-072X optocouplers
utilize the latest CMOS IC technology to achieve out-
standing performance with very low power consump-
tion. The HCPL-772X/072X require only two bypass ca-
pacitors for complete CMOS compatability.
Basic building blocks of the HCPL-772X/072X are a CMOS
LED driver IC, a high speed LED and a CMOS detector
IC. A CMOS logic input signal controls the LED driver IC
which supplies current to the LED. The detector IC incor-
porates an integrated photodiode, a high-speed tran-
simpedance amplifier, and a voltage comparator with an
output driver.
Functional Diagram
+5 V CMOS compatibility
20 ns maximum prop. delay skew
High speed: 25 MBd
40 ns max. prop. delay
10 kV/µs minimum common mode rejection
–40 to 85°C temperature range
Safety and regulatory approvals
UL recognized
– 3750 Vrms for 1 min. per UL 1577
– 5000 Vrms for 1 min. per UL 1577
(for HCPL-772X option 020)
CSA component acceptance notice #5
IEC/EN/DIN EN 60747-5-2
– VIORM = 630 Vpeak for HCPL-772X option 060
– VIORM = 560 Vpeak for HCPL-072X option 060
**VDD1 1
VI 2
*3
GND1 4
LED1
SHIELD
8 VDD2**
7 NC*
IO
6 VO
5 GND2
(PTORSUITTIHVAETpALpOBlLGicEIaCt)ions
VI, INPUT
H
L
LED1 DiVgOit,aOlUfiTePlUdTbus isolation: CC-Link, DeviceNet, Profi-
OFF bus, SDHS
ON
AC
plasLma
display
panel
level
shifting
Multiplexed data transmission
Computer peripheral interface
Microprocessor system interface
* Pin 3 is the anode of the internal LED and must be left unconnected
for guaranteed data sheet performance. Pin 7 is not connected
internally.
** A 0.1 µF bypass capacitor must be connected between pins 1 and
4, and 5 and 8.
TRUTH TABLE
POSITIVE LOGIC
VI LED1 Vo OUTPUT
H OFF H
L ON L
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.

1 Page





HCPL-7720 pdf, ピン配列
Package Outline Drawing
HCPL-772X 8-Pin DIP Package
TYPE NUMBER
1.19 (0.047) MAX.
9.65 ± 0.25
(0.380 ± 0.010)
87
65
A XXXXV
YYWW
OPTION 060 CODE*
DATE CODE
12 34
1.78 (0.070) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
4.70 (0.185) MAX.
7.62 ± 0.25
(0.300 ± 0.010)
6.35 ± 0.25
(0.250 ± 0.010)
5° TYP.
0.254
+ 0.076
- 0.051
(0.010+-
0.003)
0.002)
1.080 ± 0.320
(0.043 ± 0.013)
0.51 (0.020) MIN.
2.92 (0.115) MIN.
0.65 (0.025) MAX.
2.54 ± 0.25
(0.100 ± 0.010)
DIMENSIONS IN MILLIMETERS AND (INCHES).
*OPTION 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.



3Pages


HCPL-7720 電子部品, 半導体
Insulation and Safety Related Specifications
   Value
Parameter
Symbol 772X 072X
Minimum External Air
Gap (Clearance)
L(I01)
7.1
4.9
Minimum External
Tracking (Creepage)
L(I02)
7.4
4.8
Minimum Internal Plastic
Gap (Internal Clearance)
0.08 0.08
Tracking Resistance
(Comparative Tracking
Index)
CTI ≥175 ≥175
Isolation Group
IIIa IIIa
Units
mm
mm
mm
Volts
Conditions
Measured from input terminals to output
terminals, shortest distance through air.
Measured from input terminals to output
terminals, shortest distance path along body.
Insulation thickness between emitter and
detector; also known as distance through
insulation.
DIN IEC 112/VDE 0303 Part 1
Material Group
(DIN VDE 0110, 1/89, Table 1)
All Avago data sheets report the creepage and clearance
inherent to the optocoupler component itself. These
dimen­sions are needed as a starting point for the equip-
ment designer when determining the circuit insulation
requirements. However, once mounted on a printed
circuit board, minimum creepage and clearance require­
ments must be met as specified for individual equipment
standards. For creepage, the shortest distance path along
the surface of a printed circuit board between the solder
fillets of the input and output leads must be considered.
There are recommended techniques such as grooves
and ribs which may be used on a printed circuit board to
achieve desired creepage and clearances. Creepage and
clearance distances will also change depending on fac-
tors such as pollution degree and insulation level.


6 Page



ページ 合計 : 19 ページ
 
PDF
ダウンロード
[ HCPL-7720 データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
HCPL-7720

40 ns Propagation Delay CMOS Optocoupler

Agilent(Hewlett-Packard)
Agilent(Hewlett-Packard)
HCPL-7720

CMOS Optocoupler

Agilent
Agilent
HCPL-7720

CMOS Optocoupler

Avago
Avago
HCPL-7721

40 ns Propagation Delay CMOS Optocoupler

Agilent(Hewlett-Packard)
Agilent(Hewlett-Packard)


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap