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PDF HCMS-2901 Data sheet ( Hoja de datos )
| Número de pieza | HCMS-2901 | |
| Descripción | High Performance CMOS 5 x 7 Alphanumeric Displays | |
| Fabricantes | Avago | |
| Logotipo |  |
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HCMS-29xx Series
High Performance CMOS 5×7 Alphanumeric Displays
Data Sheet
Description
The HCMS-29xx series are high performance, easy
to use dot matrix displays driven by on-board CMOS
ICs. Each display can be directly interfaced with a
microprocessor, thus eliminating the need for cumb er
some interface components. The serial IC interface al-
lows higher character count information displays with a
minimum of data lines. A variety of colors, font heights,
and character counts gives designers a wide range of
product choices for their specific applications and the
easy to read 5×7 pixel format allows the display of up-
percase, lower case, Katakana, and custom user-defined
characters. These displays are stackable in the x- and
y- directions, making them ideal for high character
count displays.
Features
• Easy to use
• Interfaces directly with microprocessors
• 0.15” character height in 4, 8, and 16 (2×8) character
packages
• 0.20” character height in 4 and 8 character packages
• Rugged X- and Y-stackable package
• Serial input
• Convenient brightness controls
• Wave solderable
• Offered in five colors
• Low power CMOS technology
• TTL compatible
Applications
• Telecommunications equipment
• Portable data entry devices
• Computer peripherals
• Medical equipment
• Test equipment
• Business machines
• Avionics
• Industrial controls
Device Selection Guide
Description
1 × 4 0.15” Character
1 × 8 0.15” Character
2 × 8 0.15” Character
1 × 4 0.20” Character
1 × 8 0.20” Character
Deep Red
HCMS-
2905
2915
2925
2965
2975
HER
HCMS-
2902
2912
2922
2962
2972
Orange
HCMS-
2904
2914
2924
2964
2974
Yellow
HCMS-
2901
2911
2921
2961
2971
Green
HCMS-
2903
2913
2923
2963
2973
Package
Drawing
A
B
C
D
E
ESD WARNING: STANDARD CMOS HANDLING PRECAUTIONS SHOULD BE OBSERVED TO AVOID STATIC DISCHARGE.
1 page  
Electrical Characteristics Over Operating Temperature Range (-40 °C to +85 °C)
TA = 25 °C -40 °C < TA < 85 °C
VLOGIC = 5.0 V
3.0 V < VLOGIC < 5.5 V
Parameter
Symbol
Typ. Max. Min.
Max.
Units Test Conditions
Input Leakage Current
II
HCMS-290x/296x (4 char)
+7.5 -2.5
+50
HCMS-291x/297x (8 char)
+15 -5.0
+100
HCMS-292x (16 char)
+15 -5.0
+100
µA VIN = 0 V to VLOGIC
ILOGIC OPERATING
ILOGIC(OPT)
HCMS-290x/296x (4 char)
0.4 2.5
5
HCMS-291x/297x (8 char)
0.8 5
10
HCMS-292x (16 char)
0.8 5
10
mA VIN = VLOGIC
ILOGIC SLEEP [1] ILOGIC(SLP)
HCMS-290x/296x (4 char)
5 15
25
HCMS-291x/297x (8 char)
10 30
50
HCMS-292x (16 char)
10 30
50
µA VIN = VLOGIC
ILED BLANK
ILED(BL)
HMCS-290x/296x (4 char)
2.0 4
4.0
HCMS-291x/297x (8 char)
4.0 8
8
HCMS-292x (16 char)
4.0 8
8
mA BL = 0 V
ILED SLEEP [1] ILED(SLP)
HCMS-290x/296x (4 char)
1 3
50
HCMS 291x/297x (8 char)
2 6
100
HCMS-292x (16 char)
2 6
100
µA
Peak Pixel Current [2] IPIXEL VLED = 5.5 V
HCMS-29x5 (Deep Red)
15.4 17.1
18.7 mA All pixels ON,
HCMS-29xx (Other Colors)
14.0 15.9
17.1 mA Average value per pixel
HIGH Level Input Voltage
Vih
2.0
V 4.5 V < VLOGIC < 5.5 V
0.8 VLOGIC
V 3.0 V < VLOGIC < 4.5 V
LOW Level Input Voltage
Vil
0.8 V 4.5 V < VLOGIC < 5.5 V
0.2 VLOGIC V
3.0 V < VLOGIC < 4.5 V
HIGH Level Output Voltage Voh 2.0
V VLOGIC = 4.5 V,
Ioh = -40 µA
0.8 VLOGIC
V 3.0 V < VLOGIC < 4.5 V
LOW Level Output Voltage
Vol
0.4 V VLOGIC = 5.5 V,
Iol = 1.6 mA [3]
0.2 VLOGIC V
3.0 V < VLOGIC < 4.5 V
Thermal Resistance
RqJ-P
70
°C/W IC junction to pin
Notes:
1. In SLEEP mode, the internal oscillator and reference current for LED drivers are off.
2. Average peak pixel current is measured at the maximum drive current set by Control Register 0. Individual pixels may exceed this value.
3. For the Oscillator Output, Iol = 40 µA.
5
5 Page 
Control Word 1
Loading the Control Register with D7 = logic high selects
Control Word 1. This Control Word performs two func-
tions: serial/simultaneous data out mode and external
oscillator prescale select (see Table 2).
Serial/Simultaneous Data Output D0
Bit D0 of control word 1 is used to switch the mode of
DOUT between serial and simult an eous data entry during
Control Register writes. The default mode (logic low) is
the serial DOUT mode. In serial mode, DOUT is connected
to the last bit (D7) of the Control Shift Register.
Storing a logic high to bit D0 changes DOUT to simulta-
neous mode which affects the Control Register only. In
simultaneous mode, DOUT is logically conn ected to DIN.
This arrangement allows multiple ICs to have their Control
Registers written to simultaneously. For example, for N
ICs in the serial mode, N*8 clock pulses are needed to
load the same data in all Control Registers. In the simul-
taneous mode, N ICs only need 8 clock pulses to load
the same data in all Control Registers. The propagation
delay from the first IC to the last is N * tDOUTP.
External Oscillator Prescaler Bit D1
Bit D1 of Control Word 1 is used to scale the frequency
of an external Display Oscillator. When this bit is logic
low, the external Display Oscillator directly sets the inter-
nal display clock rate. When this bit is a logic high, the
external oscillator is divided by 8. This scaled frequency
then sets the internal display clock rate. It takes 512
cycles of the display clock (or 8 x 512 = 4096 cycles of
an external clock with the divide by 8 pres caler) to com
pletely refresh the display once. Using the prescaler bit
allows the designer to use a higher external oscillator
freq uency without extra circuitry.
This bit has no affect on the internal Display Oscillator
Frequency.
Bits D2‑D6
These bits must always be programmed to logic low.
Cascaded ICs
Figure 3 shows how two ICs are connected within an
HCMS‑29xx display. The first IC controls the four left‑most
characters and the second IC controls the four right‑most
characters. The Dot Registers are connected in series to
form a 320‑bit dot shift register. The location of pixel 0
has not changed. However, Dot Shift Register bit 0 of
IC2 becomes bit 160 of the 320‑bit dot shift register.
The Control Registers of the two ICs are independent
of each other. This means that to adjust the display
brightness the same control word must be entered
into both ICs, unless the Control Registers are set to
simultaneous mode.
Longer character string systems can be built by cascad-
ing multiple displays together. This is accomplished by
creating a five line bus. This bus consists of CE, RS, BL,
Reset, and CLK. The display pins are connected to the
corresponding bus line. Thus, all CE pins are connected to
the CE bus line. Similarly, bus lines for RS, BL, Reset, and
CLK are created. Then DIN is connected to the right‑most
display. DOUT from this display is connected to the next
display. The left‑most display receives its DIN from the
DOUT of the display to its right. DOUT from the left‑most
display is not used.
Each display may be set to use its internal oscillator, or
the displays may be synchronized by setting up one
display as the master and the others as slaves. The slaves
are set to receive their oscillator input from the master’s
oscillator output.
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet HCMS-2901.PDF ] | |
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