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ITS4100S-SJ-N の電気的特性と機能

ITS4100S-SJ-NのメーカーはInfineonです、この部品の機能は「Smart High-Side NMOS-Power Switch」です。


製品の詳細 ( Datasheet PDF )

部品番号 ITS4100S-SJ-N
部品説明 Smart High-Side NMOS-Power Switch
メーカ Infineon
ロゴ Infineon ロゴ 




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ITS4100S-SJ-N Datasheet, ITS4100S-SJ-N PDF,ピン配置, 機能
ITS4100S-SJ-N
Smart High-Side NMOS-Power Switch
Data Sheet
Rev 1.0, 2012-09-01
Standard Power

1 Page





ITS4100S-SJ-N pdf, ピン配列
2 Block Diagram and Terms
ITS4100S-SJ-N
Block Diagram and Terms
ITS4100S-SJ-N
IN 2
NC 4
Bias
Supervision
Overvoltage
Protection
ESD
Protection
Logic
Current
Limiter
Gate
Control
Circuit
Temperature
Sensor
Figure 1 Block diagram
1
GND
VS
5
6
7
8
OUT
3
Voltage- and Current-Definitions:
ITS4100S-SJ-N
IN
IIN
2
NC 4
Bias
Supervision
Overvoltage
Protection
Current
Limiter
ESD
Protection
Logic
Gate
Control
Circuit
Temperature
Sensor
1
GND
VS
5
IS
6
7
8
OUT
3
IOUT
IL
GND
Switching Times and Slew Rate Definitions:
VIN
H
L
VOUT
0
IL
+VS
SRON
tON
90%
70%
SROFF
40%
30%
VDS
10%
tOFF
t
t
0
OFF
ON OFF t
Figure 2 Terms - parameter definition
Data Sheet
3
Rev 1.0, 2012-09-01


3Pages


ITS4100S-SJ-N 電子部品, 半導体
4.2 Functional Range
ITS4100S-SJ-N
General Product Characteristics
Table 2 Functional Range
Parameter
Nominal Operating Voltage
Symbol
Min.
VS 5
Values
Typ. Max.
Unit
Note /
Test Condition
34 V VS increasing
Number
4.2.1
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3 Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Table 3 Thermal Resistance1)
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
Number
Thermal Resistance - Junction to
pin5
Thermal Resistance - Junction to
Ambient - 1s0p, minimal footprint
Thermal Resistance - Junction to
Ambient - 1s0p, 300mm2
Thermal Resistance - Junction to
Ambient - 1s0p, 600mm2
Thermal Resistance - Junction to
Ambient - 2s2p
Thermal Resistance - Junction to
Ambient with thermal vias - 2s2p
Rthj-pin5
RthJA_1s0p
RthJA_1s0p_300mm
RthJA_1s0p_600mm
RthJA_2s2p
RthJA_2s2p
32.0
135.3
86.1
75.3
66.8
58.4
K/W
K/W 2)
K/W 3)
K/W 4)
K/W 5)
K/W 6)
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
1) Not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, footprint; the Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu.
3) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, Cu, 300mm2; the Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu.
4) Specified RthJA value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, 600mm2; the Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu.
5) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; the Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
6) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board with two thermal vias;
the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2
x 35µm Cu. The diameter of the two vias are equal 0.3mm and have a plating of 25um with a copper heatsink area of 3mm
x 2mm). JEDEC51-7: The two plated-through hole vias should have a solder land of no less than 1.25 mm diameter with a
drill hole of no less than 0.85 mm diameter.
Data Sheet
6 Rev 1.0, 2012-09-01

6 Page



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部品番号部品説明メーカ
ITS4100S-SJ-N

Smart High-Side NMOS-Power Switch

Infineon
Infineon


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