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PDF IR3538A Data sheet ( Hoja de datos )

Número de pieza IR3538A
Descripción Digital Multi-Phase Buck Controller
Fabricantes International Rectifier 
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No Preview Available ! IR3538A Hoja de datos, Descripción, Manual

Digital Multi-Phase Buck Controller
IR3536A
IR3538A
FEATURES
6-phase & 8-phase dual output PWM Controller
Phases are flexibly assigned between Loops 1 & 2
Intel® VR12, AMD® 3.4MHz SVI/PVI & Memory
modes
Overclocking & Gaming Mode with Vmax setting
Switching frequency from 200kHz to 1.2MHz per
phase
IR Efficiency Shaping Features including Variable
Gate Drive and Dynamic Phase Control
Programmable 1-phase or 2-phase for Light Loads
and Active Diode Emulation for Very Light Loads
IR Adaptive Transient Algorithm (ATA) on both loops
minimizes output bulk capacitors and system cost
Auto-Phase Detection with auto-compensation
Per-Loop Fault Protection: OVP, UVP, OCP, OTP, CFP
I2C/SMBus/PMBus system interface for telemetry
of Temperature, Voltage, Current & Power for
both loops
Non-Volatile Memory (NVM) for custom
configuration
Compatible with IR ATL and 3.3V Tri-state Drivers
+3.3V supply voltage; -20ºC to 85ºC ambient
operation
Pb-Free, RoHS, 7x7 48-pin & 8x8 56-pin QFN, MSL2
package
APPLICATIONS
Intel ® VR12 & AMD® SVI & PVI based systems
DDR Memory with Vtt tracking
Overclocked & Gaming platforms
DESCRIPTION
The IR3536A and IR3538A are dual-loop digital multi-phase
buck controllers. The IR3536A drive up to 6 phases and the
IR3538A drives up to 8 phases. The IR3536A and IR3538A
are fully Intel® VR12 and AMD® SVI/PVI compliant on both
loops and provide a Vtt tracking function for DDR memory.
The IR3536A and IR3538A include the IR Efficiency
Shaping Technology to deliver exceptional efficiency at
minimum cost across the entire load range.
IR Variable Gate Drive optimizes the MOSFET gate drive
voltage based on real-time load current. IR Dynamic Phase
Control adds/drops phases based upon load current.
The IR3536A and IR3538A can be configured to enter 1-
phase operation and active diode emulation mode
automatically or by command.
IR’s unique Adaptive Transient Algorithm (ATA), based on
proprietary non-linear digital PWM algorithms, minimizes
output bulk capacitors.
The I2C/PMBus interface can communicate with up to 16
IR3536A and IR3538A based VR loops. Device
configuration and fault parameters are easily defined using
the IR Intuitive Power Designer (DPDC) GUI
and stored in on-chip NVM.
The IR3536A and IR3538A provides extensive OVP, UVP,
OCP and OTP fault protection and includes thermistor
based temperature sensing with VR_HOT signal.
NVM storage saves pins and enables a small package size.
The IR3536A and IR3538A also include numerous features
like register diagnostics for fast design cycles and platform
differentiation, truly simplifying
VRD design and enabling fastest time-to-market with its
“set-and-forget” methodology.
PIN DIAGRAM
Figure 1: IR3536A Package Top View
1 June 21, 2013 | FINAL | V1.09
Figure 2: IR3538A Package Top View

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