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CS497014 の電気的特性と機能

CS497014のメーカーはCirrus Logicです、この部品の機能は「High Definition Audio Decoder DSP」です。


製品の詳細 ( Datasheet PDF )

部品番号 CS497014
部品説明 High Definition Audio Decoder DSP
メーカ Cirrus Logic
ロゴ Cirrus Logic ロゴ 




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CS497014 Datasheet, CS497014 PDF,ピン配置, 機能
CS4970x4 Data Sheet
FEATURES
Multi-standard 32-bit high-definition audio decoding plus
post-processing
Supports high-definition audio formats including:
— Dolby Digital® Plus
— Dolby® TrueHD
— DTS-HD® High Resolution Audio
— DTS-HD Master Audio
— DTS Express5.1
Supports legacy audio formats and a wide array of post-
processing
— Dolby Digital® EX, Dolby Pro Logic® II, IIx, IIz 7.1, Dolby
Headphone® 2, Dolby Virtual Speaker® 2, Dolby
Volume® (original), Dolby Volume 258 (lite), Audistry®
— DTS-ES 96/24Discrete 7.1, DTS-ESDiscrete 7.1,
DTS-ESMatrix 6.1, DTS Neo:6®, DTS Neural
SurroundDTS Surround Sensation Speaker
— MPEG-2 AACLC 5.1
— SRS® Circle Surround® II, SRS Circle Surround Auto,
SRS Circle Surround Decoder Optimized, SRS
TruVolume7.1 (V 2.1.0.0), SRS TruSurround
HD/HD4®, SRS WOW HD, SRS CS Headphone,
SRS Circle Cinema 3D, SRS Studio Sound HD
— THX® Ultra2, THX Select2
Cirrus Logic’s Applications Library
— Cirrus Original Multi-Channel Surround 2 (COMS2),
Cirrus Band XpandeR, Cirrus Virtualization
Technology (CVT), Cirrus Intelligent Room Calibration 2
(IRC2), Cirrus Bass Enhancement (CBE)
— Crossbar Mixer, Signal Generator
— Advanced Post-Processors including: 7.1 Bass Manager
Quadruple Crossover, Tone Control, 11- Band
Parametric EQ, Delay, 2:1/4:1 Decimator, 1:2/1:4
Upsampler
High Definition Audio Decoder DSP Family
with Dual 32-bit Engine Technology
Up to 12 Channels of 32-bit Serial Audio Input
Customer Software Security Keys
16 Ch x 32-bit PCM Out with Dual 192 kHz S/PDIF Tx
Two SPI/I2Cports
Large On-chip X, Y, and Program RAM & ROM
SDRAM and Serial Flash Memory Support
The CS4970x4 DSP family is an enhanced version of the
CS4953xx DSP family with higher overall performance. In
addition to all the mainstream audio processing codes in on-
chip ROM that the CS4953xx DSP offers, the CS4970x4 device
family also supports the decoding of major high-definition audio
formats. Additionally, the CS4970x4, a dual-core device,
performs the high-definition audio decoding on the first core,
leaving the second core available for audio post-processing and
audio enhancement. The CS4970x4 device supports the most
demanding audio post processing requirements. It provides an
easy upgrade path to systems currently using the CS495xx or
CS4953xx device with minor (or no) hardware and software
changes.
Ordering Information
See page 27 for ordering information.
Serial
Control 1
12 Ch. Audio In /
6 Ch. SACD In
S/PDIF S/PDIF
16 Ch PCM
Audio Out
Serial
Control 2
Parallel
Control
GPIO
Debug
Coyote 32-bit
DSP A
D
M
A
Coyote 32-bit
DSP B
PXY
PXY
Ext. Memory Controller
STC
TMR1
TMR2
PLL
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
Copyright © 2014 Cirrus Logic, Inc.
All Rights Reserved
FEB 2014
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CS497014 pdf, ピン配列
List of Figures
CS4970x4 Data Sheet
32-bit High Definition Audio Decoder DSP Family
Figure 1. RESET Timing .........................................................................................................................................11
Figure 2. XTI Timing ..............................................................................................................................................11
Figure 3. Serial Control Port - SPI Slave Mode Timing ..........................................................................................13
Figure 4. Serial Control Port - SPI Master Mode Timing ........................................................................................14
Figure 5. Serial Control Port - I2C Slave Mode Timing ..........................................................................................15
Figure 6. Serial Control Port - I2C Master Mode Timing ........................................................................................16
Figure 7. Parallel Control Port - IntelÒ Slave Mode Read Cycle ...........................................................................17
Figure 8. Parallel Control Port - Intel Slave Mode Write Cycle ..............................................................................18
Figure 9. Parallel Control Port - MotorolaÒ Slave Mode Read Cycle Timing ........................................................20
Figure 10. Parallel Control Port - Motorola Slave Mode Write Cycle Timing .........................................................20
Figure 11. Digital Audio Input (DAI) Port Timing Diagram .....................................................................................21
Figure 12. DAI Slave Timing Diagram ...................................................................................................................21
Figure 13. Digital Audio Port Output Timing Master Mode .....................................................................................22
Figure 14. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK) ...........................................23
Figure 15. External Memory Interface - SDRAM Burst Read Cycle .......................................................................24
Figure 16. External Memory Interface - SDRAM Burst Write Cycle .......................................................................24
Figure 17. External Memory Interface - SDRAM Auto Refresh Cycle ....................................................................25
Figure 18. External Memory Interface - SDRAM Load Mode Register Cycle ........................................................26
Figure 19. 128-Pin LQFP Pin-Out Diagram ...........................................................................................................28
Figure 20. 128-Pin LQFP Package Drawing ..........................................................................................................29
List of Tables
Table 1. CS4970x4 Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 2. Device and Firmware Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. CS4970x4 DSP Memory Sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 5. Environmental, Manufacturing, & Handling Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 6. 128-Pin LQFP Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
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CS497014 電子部品, 半導体
CS4970x4 Data Sheet
32-bit High Definition Audio Decoder DSP Family
OS/Kernel - Encompasses all non-audio processing tasks, including loading data from external memory,
processing host messages, calling audio-processing subroutines, auto-detection, error concealment, etc.
Decoders - Any module that initially writes data into the audio I/O buffers, e.g. AC-3, DTS, PCM, etc. All
the decoding/processing algorithms listed require delivery of PCM or IEC61937-packed, compressed data
via I2S- or LJ-formatted digital audio to the CS4970x4 from A/D converters, SPDIF Rx, HDMI Rx, etc.
Matrix-processors - Any module that processes audio I/O buffer PCM data in-place before the Post-
processors. Generally speaking, these modules alter the number of valid channels in the audio I/O buffer
through processes like Virtualization (n2 channels) or Matrix Decoding (2n channels). Examples are
Dolby ProLogic IIx and DTS Neo:6.
Virtualizer-processor - Any module that encodes PCM data into fewer output channels than input
channels (n2 channels) with the effect of providing “phantom” speakers to represent the physical audio
channels that were eliminated. Examples are Dolby Headphone 2 and Dolby Virtual Speaker 2. Generally
speaking, these modules reduce the number of valid channels in the audio I/O buffer.
Post-processors - Any module that processes audio I/O buffer PCM data in-place after the matrix
processors. Examples are bass management, audio manager, tone control, EQ, delay, customer-specific
effects, Dolby Headphone/Virtual Speaker, etc.
The overlay structure reduces the time required to reconfigure the DSP when a processing change is
requested. Each overlay can be reloaded independently without disturbing the other overlays. For example,
when a new decoder is selected, the OS, matrix-, and post-processors do not need to be reloaded — only the
new decoder (the same is true for the other overlays).
4 Hardware Functional Description
4.1 Coyote DSP Core
The CS4970x4 is a dual-core Coyote DSP with separate X and Y data and P code memory spaces. Each core
is a high-performance, 32-bit, user-programmable, fixed-point DSP that is capable of performing two multiply
accumulate (MAC) operations per clock cycle. Each core has eight 72-bit accumulators, four X- and four Y-data
registers, and 12 index registers.
Both DSP cores are coupled to a flexible DMA engine. The DMA engine can move data between peripherals
such as the digital audio input (DAI) and digital audio output (DAO), external memory, or any DSP core
memory, all without the intervention of the DSP. The DMA engine offloads data move instructions from the DSP
core, leaving more MIPS available for signal processing instructions.
CS4970x4 functionality is controlled by application codes that are stored in on-board ROM or downloaded to
the CS4970x4 from a host MCU or external FLASH/EEPROM. Users can choose to use standard audio
decoder and post-processor modules which are available from Cirrus Logic.
The CS4970x4 is suitable for audio decoder, audio post-processor, audio encoder, DVD audio/video player,
and digital broadcast decoder applications.
4.1.1 DSP Memory
Each DSP core has its own on-chip data and program RAM and ROM and does not require external memory
for any of today’s popular audio algorithms including Dolby Digital Surround EX, AAC Multichannel, DTS-ES
96/24, and THX Ultra2. However, if the end-system design requires support of the new high-definition audio
formats, external SDRAM will be needed to support Dolby TrueHD and DTS-HD master audio.
The memory maps for the DSPs are as follows. All memory sizes are composed of 32-bit words.
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部品番号部品説明メーカ
CS497014

High Definition Audio Decoder DSP

Cirrus Logic
Cirrus Logic


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