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PDF SAF7741HV Data sheet ( Hoja de datos )

Número de pieza SAF7741HV
Descripción Dual IF car radio and audio DSP
Fabricantes NXP Semiconductors 
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1. car radio and audio DSP






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SAF7741HV
Dual IF car radio and audio DSP (N1F)
Rev. 05 — 09 May 2008
Objective data sheet
1. General description
The SAF7741HV is a combined Intermediate-Frequency (IF) car radio and audio Digital
Signal Processor (DSP) with several powerful cores integrated onto a single device. It
combines analog IF input, digital radio and audio processing, sample-rate converters and
digital and analog audio output to enhance listening clarity and noise suppression while
reducing multipath channel effect.
The SAF7741 offers user-specific functions which can be configured to match the
software platform required by the systems of individual car-radio manufacturers, thus
providing a high level of product differentiation. It is equipped to work with the TEF7000
and TEF6730 integrated tuners for analog and digital AM/FM decoding and sound
processing
The SAF7741HV consists of two main processing blocks; one for radio and the other for
audio. These blocks demodulate either the IF or the low-IF tuner output, delivering digital
audio to internal Digital-to-Analog Converters (DACs). In addition to the main blocks there
are a number of interfaces and dedicated sub-circuits.
1.1 Radio processing
The IF radio block interfaces to the front-end tuner chips and supports either a so-called
low-IF frequency (of 60 kHz or 300 kHz ) or an IF frequency of 10.7 MHz. Two tuner
interfaces are supported, each of which is suitable for analog Frequency-
Modulated/Amplitude-Modulated and Weatherband (FM/AM/WX) radio reception as well
as reception of encoded digital signals such as HD Radio and Digital Radio Mondiale
(DRM).
Signals received from the tuner front-end chips are digitized with integrated Intermediate-
Frequency Analog-to-Digital Converters (IFADCs). The resulting digital signals are then
down-sampled, error-corrected and filtered in the digital domain to be suitable for further
radio and audio processing by the DSPs.
The low-IF interface to the tuner chip combined with the high level of integration allows
cost-effective implementation of the entire tuner/DSP application on a main radio Printed
Circuit Board (PCB).
1.2 Audio processing
The audio processing block receives either external digital signals, or analog signals
which are then digitized by the integrated ADCs. Together with the internal radio audio
signals these inputs are available for further audio processing such as equalization, tone
control and volume control. The output signals of the audio processing block are provided
in digital format on the Host IIS outputs and in analog format on the DAC outputs.

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SAF7741HV pdf
NXP Semiconductors
SAF7741HV
Dual IF car radio and audio DSP (N1F)
SD_HOST_
IN1..5
AIN0_R
AIN0_L
AIN1_R
AIN1_L
AIN2_R
AIN2_L
AIN3
AIN4
IN1
IN2
IN3
IN4
SPDIF1_IN1
SPDIF1_IN2
(A) RADIO
SECTION
(B) RADIO
SECTION
FS_SYS
(C) RADIO
SECTION
SAF7741HV
5
A
N
A
LS
OE
GL
S
O
U
R
C
E
C
T
O
R
E
SELECTOR
AD1
AD2
AD3
AD4
AD5
3
3
3
3
BITSLICER
BITSLICER
DIGITAL
SPDIF
DECODER
DIGITAL
SPDIF
DECODER
D
I
GS
IE
TL
A E SDSP
LC
T
SO
O R 800XRAM
U 1024YROM
R
C
7168PROM
E
WS_HOST
FOSC
OSC
DIV
D PLL
I
V
AUDIO
/4
FSREF_RADIO FSREF_AUDIO
4
dac_fl
dac_fr
dac_rl
ADSP
AUDIO
PROCESSING
dac_rr
dac_center
dac_subw
DAC
DAC
DAC
DAC
DAC
DAC
256 PRAM
1280 YRAM
2816 XRAM
9216 PROM
8
WATCHDOG 12C
dsp_clk
DSP
PLL
Fosc
ADSP-TDSP1E
INTERFACE
REGULATOR 4
SD_HOST_OUT1..4
BCK_HOST
WS_HOST
DAC_FL
DAC_FR
DAC_RL
DAC_RR
DAC_CENTER
DAC_SUBW
ADSP_IOF4..11
SCL
SDA
SCL_DICE
SDA_DICE
Fig 2. Block diagram of SAF7741HV audio section
SAF7741_5
Objective data sheet
Rev. 05 — 09 May 2008
© NXP B.V. 2008. All rights reserved.
5 of 83

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SAF7741HV arduino
NXP Semiconductors
SAF7741HV
Dual IF car radio and audio DSP (N1F)
Table 3. Pad name description …continued
Pad Name
Description
vddi VDD pad connected to CORE VDD and internal VDD supply rail in I/O ring
vssi VSS pad connected to CORE VSS and internal VSS supply rail in I/O ring
vsse
VSS pad connected to external (noisy) VSS supply rail
vssis
VSS pad connected to CORE VSS, internal VSS supply rail in I/O ring and substrate rail in I/O ring
vssco
VSS pad connected to CORE VSS
7. Functional description
7.1 Radio subsystem
The complete radio system is able to receive FM, AM, Weatherband, RDS and FM/AM
digital radio. The SAF7741HV radio section will incorporate the following features (see
Figure 1):
Two IFADCs to digitize the incoming analog IF signals from the tuner(s)
Two Primary Decimation Chains (PDCs) for analog and digital radio reception,
including digital mixing to Zero IF (ZIF)
Software-based radio functionality running on one or more DSPs depending on the
features set and dual or single tuner usage
The IFADC digitizes the incoming Near-Zero Intermediate Frequency (NZIF) signals. The
IFADC is a baseband ΣΔ ADC.
The PDC decimates the incoming data stream by a factor of 128 before passing it to the
software radio for processing.
For digital radio reception the PDC decimates the incoming data stream by 64 before it is
forwarded to the external co-processor.
The software radio consists of three Tuner DSPs: TDSP1, TDSP2 and TDSP1E. All three
TDSPs have a basically identical structure, but TDSP1 and TDSP2 are extended with:
A Finite Impulse Response (FIR) filter
CORDIC (COordinate Rotation DIgital Calculation) Rotate and De-rotate (CRD)
TDSP1E is extended with a CRD only. Each FIR (controlled by the TDSP) is used for
variable bandwidth control and for the Polar-to-Rectangular (P->R), Rectangular-to-Polar
(R->P) and DIV conversions that will be used for demodulation. Added to this block is a
2LOG(LD(x)) function.
In addition, a Radio General-Purpose DAC (RGPDAC) and an RDS decoder are included
for each tuner channel.
The SAF7741HV chip is capable of handling full dual radio. Depending on the firmware,
several such configurations are possible:
Dual radio with two stereo-audio output channels. The attainable performance
depends on the DSP tuner firmware. The available feature set is less than that for
one-channel radio
SAF7741_5
Objective data sheet
Rev. 05 — 09 May 2008
© NXP B.V. 2008. All rights reserved.
11 of 83

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