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95F118BW の電気的特性と機能

95F118BWのメーカーはFujitsu Media Devicesです、この部品の機能は「MB95F118BW」です。


製品の詳細 ( Datasheet PDF )

部品番号 95F118BW
部品説明 MB95F118BW
メーカ Fujitsu Media Devices
ロゴ Fujitsu Media Devices ロゴ 




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95F118BW Datasheet, 95F118BW PDF,ピン配置, 機能
FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12615-1E
8-bit Proprietary Microcontrollers
CMOS
F2MC-8FX MB95110B Series
www.DataSheetM4U.coBm 95116B/F118BS/F118BW/FV100D-101
DESCRIPTION
The MB95110B series is general-purpose, single-chip microcontrollers. In addition to a compact instruction set,
the microcontrollers contain a variety of peripheral functions.
Note : F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
FEATURES
F2MC-8FX CPU core
Instruction set that is optimum to the controllers
• Multiplication and division instructions
• 16-bit arithmetic operation
• Bit test branch instruction
• Bit manipulation instructions etc.
Clock
• Main clock
• Main PLL clock
• Sub clock (for dual clock product)
• Sub PLL clock (for dual clock product)
(Continued)
Be sure to refer to the “Check Sheet” for the latest cautions on development.
“Check Sheet” is seen at the following support page
URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html
“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system
development.
Copyright©2006 FUJITSU LIMITED All rights reserved

1 Page





95F118BW pdf, ピン配列
MB95110B Series
PRODUCT LINEUP
Part number
Parameter
MB95116B
MB95F118BS
MB95F118BW
Type
MASK ROM product
Flash memory product
ROM capacity
32 Kbytes
60 Kbytes
RAM capacity
1 Kbyte
2 Kbytes
Reset output
No
www.DataSheet4U.coCmlock system
Selectable
single/dual clock*2
Single clock
Dual clock
Low voltage
detection reset
No
CPU functions
General-purpose I/O
port
Number of basic instructions
: 136
Instruction bit length
: 8 bits
Instruction length
: 1 to 3 bytes
Data bit length
: 1, 8, and 16 bits
Minimum instruction execution time : 61.5 ns (at machine clock frequency 16.25MHz)
Interrupt processing time
: 0.6 µs (at machine clock frequency 16.25 MHz)
Single clock product : 39 ports (N-ch open drain : 2 ports, CMOS : 37 ports)
Dual clock product : 37 ports (N-ch open drain : 2 ports, CMOS : 35 ports)
Time-base timer
Interrupt cycle : 0.5 ms, 2.1 ms, 8.2 ms, 32.8 ms (at main oscillation clock 4 MHz)
Watchdog timer
Reset generated cycle
At main oscillation clock 10 MHz
: Minimum 105 ms
At sub oscillation clock 32.768 kHz (for dual clock product) : Minimum 250 ms
Wild register
Capable of replacing 3 bytes of ROM data
Master/slave sending and receiving
Bus error function and arbitration function
I2C Detecting transmitting direction function
Start condition repeated generation and detection functions
Built-in wake-up function
UART/SIO
Data transfer capable in UART/SIO
Full duplex double buffer, variable data length (5/6/7/8-bit), built-in baud rate generator
NRZ type transfer format, error detected function
LSB-first or MSB-first can be selected.
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable.
LIN-UART
Dedicated reload timer allowing a wide range of communication speeds to be set.
Full duplex double buffer.
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable.
LIN functions available as the LIN master or LIN slave.
8/10-bit A/D converter
(8 channels)
8-bit or 10-bit resolution can be selected.
(Continued)
3


3Pages


95F118BW 電子部品, 半導体
MB95110B Series
DIFFERENCES AMONG PRODUCTS AND NOTES ON SELECTING PRODUCTS
Notes on Using Evaluation Products
The evaluation product has not only the functions of the MB95110B corresponding products series but also
those of other products to support software development for multiple series and models of the F2MC-8FX family.
The I/O addresses for peripheral resources not used by the MB95110B series are therefore access-barred.
Read/write access to these access-barred addresses may cause peripheral resources supposed to be unused
to operate, resulting in unexpected malfunctions of hardware or software.
Particularly, do not use word access to odd numbered byte address in the prohibited areas (If these access are
used, the address may be read or written unexpectedly).
www.DataSheet4U.cNoomte that the values read from barred addresses are different between the evaluation product and the Flash
memory product. Therefore, the value must not be used for program.
The evaluation product do not support the functions of some bits in single-byte registers. Read/write access to
these bits does not cause hardware malfunctions. The evaluation, Flash memory, and MASK ROM products are
designed to behave completely the same way in terms of hardware and software.
Difference of Memory Spaces
If the amount of memory on the evaluation product is different from that of the Flash memory or MASK ROM
product, carefully check the difference in the amount of memory from the model to be actually used when
developing software.
For details of memory space, refer to “CPU CORE”.
Current Consumption
The current consumption of Flash memory product is greater than for MASK ROM product.
For details of current consumption, refer to “ELECTRICAL CHARACTERISTICS”.
Package
For details of information on each package, refer to “PACKAGE DIMENSIONS”.
Operating voltage
The operating voltage are different among the evaluation, Flash memory, and MASK ROM products.
For details of operating voltage, refer to “ELECTRICAL CHARACTERISTICS”
Difference between RST and MOD pins
The input type of RST and MOD pins is CMOS input on the Flash memory product.
The RST and MOD pins are hysteresis inputs on the MASK ROM product. A pull - down resistor is provided for
the MOD pin of the MASK ROM product.
6

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部品番号部品説明メーカ
95F118BW

MB95F118BW

Fujitsu Media Devices
Fujitsu Media Devices


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