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Pm25LV020 の電気的特性と機能

Pm25LV020のメーカーはProgrammable Microelectronicsです、この部品の機能は「Serial Flash Memory」です。


製品の詳細 ( Datasheet PDF )

部品番号 Pm25LV020
部品説明 Serial Flash Memory
メーカ Programmable Microelectronics
ロゴ Programmable Microelectronics ロゴ 




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Pm25LV020 Datasheet, Pm25LV020 PDF,ピン配置, 機能
FEATURES
Pm25LV512A / 010A / 020 / 040
512 Kbit /1 Mbit / 2 Mbit / 4 Mbit 3.0 Volt-only,
Serial Flash Memory With 100 MHz SPI Bus Interface
Single Power Supply Operation
- Low voltage range: 2.7 V - 3.6 V
• Memory Organization
- Pm25LV512A: 64K x 8 (512 Kbit)
- Pm25LV010A: 128K x 8 (1 Mbit)
- Pm25LV020: 256K x 8 (2 Mbit)
- Pm25LV040: 512K x 8 (4 Mbit)
Cost Effective Sector/Block Architecture
- 512Kb : Uniform 4Kbyte sectors / Two uniform
32Kbyte blocks
- 1Mb : Uniform 4Kbyte sectors / Four uniform
32Kbyte blocks
- 2Mb : Uniform 4Kbyte sectors / Four uniform
64Kbyte blocks
- 4Mb : Uniform 4Kbyte sectors / Eight uniform
64Kbyte blocks
- Bottom sector is configurable as one 4Kbyte sector
or four 1Kbyte sectors (except Pm25LV512A)
Serial Peripheral Interface (SPI) Compatible
- Supports SPI Modes 0 (0,0) and 3 (1,1)
- Maximum 33 MHz clock rate for normal read
- Maximum 100 MHz clock rate for fast read
Page Program (up to 256 Bytes) Operation
- Typical 2 ms per page program
Sector, Block or Chip Erase Operation
- Typical 60 ms sector, block or chip erase
Software Write Protection
- The Block Protect (BP2, BP1, BP0) bits allow partial
or entire memory to be configured as read-only
Hardware Write Protection
- Protect and unprotect the device from write operation
by Write Protect (WP#) Pin
Low Power Consumption
- Typical 10 mA active read current
- Typical 15 mA program/erase current
High Product Endurance
- Guarantee 200,000 program/erase cycles per single
sector
- Minimum 20 years data retention
Industrial Standard Pin-out and Package
- 8-pin 150mil SOIC
- 8-pin 208mil SOIC for Pm25LV040
- 8-pin 300mil PDIP for Pm25LV040
- 8-contact WSON
- 8-pin TSSOP for Pm25LV512A
GENERAL DESCRIPTION
The Pm25LV512A/010A/020/040 are 512Kbit/1 Mbit/2 Mbit/4 Mbit 3.0 Volt-only Serial Peripheral Interface (SPI)
Flash memories. The devices are designed to support 33 MHz fastest clock rate in the industry in normal read
mode, 100 MHz in fast read mode and the bottom 4 Kbyte sector into four smaller 1 Kbyte sectors features(except
Pm25LV512A). The devices use a single low voltage, ranging from 2.7 Volt to 3.6 Volt, power supply to perform
read, erase and program operations. The devices can be programmed in standard EPROM programmers as well.
The Pm25LV512A/010A is backward compatible to their predecessors Pm25LV512/010.
The Pm25LV512A/010A/020/040 are accessed through a 4-wire SPI Interface consists of Serial Data Input (Sl),
Serial Data Output (SO), Serial Clock (SCK), and Chip Enable (CE#) pins. The devices support page program
mode, 1 to 256 bytes data can be programmed into the memory in one program operation. The memory of
Pm25LV512A/010A is divided into uniform 4 Kbyte sectors or uniform 32 Kbyte blocks (sector group - consists of
eight adjacent sectors) for data or code storage. The memory of Pm25LV020/040 are divided into uniform 4 Kbyte
sectors or uniform 64 Kbyte blocks (sector group - consists of sixteen adjacent sectors). The devices have an
innovative feature to configure the bottom 4 Kbyte sector into four smaller 1 Kbyte sectors for eliminating additional
serial EEPROM needed for storing data. This is a further cost reduction for overall system.
The Pm25LV512A/010A/020/040 are manufactured on pFLASH™’s advanced nonvolatile technology. The devices
are offered in 8-pin SOIC, 8-contact WSON and 8-pin PDIP (Pm25LV040) packages with operation frequency up to
100 MHz in fast read and 33 MHz in normal read mode.
Chingis Technology Corporation
1 Issue Date: Feb., 2009, Rev: 3.5

1 Page





Pm25LV020 pdf, ピン配列
PRODUCT ORDERING INFORMATION
Pm25LVxxxA -100 S C E R
Pm25LV512A/010A/020/040
Packing Type
R = Tape & Reel
Blank = Tube
Environmental Attribute
E = Lead-free/RoHS compliance package
Blank = Standard package
Temperature Range
C = Commercial (-40°C to +105°C)
Package Type
S = 8-pin SOIC 150 mil (8S)
B = 8-pin SOIC 208 mil (8B)
K = 8-contact WSON (8K)
P = 8-pin PDIP 300 mil (8P)
D = TSSOP (8D)
Operating Frequency
-100 : 33MHz normal read, 100MHz fast read
Device Number
Pm25LV512A/010A/020/040
Part Number
Pm25LV512A-100SCE
Pm25LV010A-100SCE
Pm25LV020-100SCE
Pm25LV040-100SCE
Pm25LV512A-100KCE
Pm25LV010A-100KCE
Pm25LV020-100KCE
Pm25LV040-100KCE
Pm25LV040-100BCE
Pm25LV040-100PCE
Pm25LV512A-100DCE
Pm25LV512A-100WC
Pm25LV010A-100WC
Pm25LV020-100WC
Operating Frequency (MHz)
100
100
100
100
100
100
100
100
Package
8S 150mil SOIC
8Q WSON
8B 208mil SOIC
8P 300mil PDIP
8D TSSOP
KGD
Temperature Range
Commercial
(-40oC to +105oC)
Commercial
(-40oC to 105oC)
Chingis Technology Corporation
3 Issue Date: Feb., 2009, Rev: 3.5


3Pages


Pm25LV020 電子部品, 半導体
Pm25LV512A/010A/020/040
REGISTERS
The Pm25LV512A/010A/020/040 are designed to inter-
face directly with the synchronous Serial Peripheral In-
terface (SPI) of Motorola MC68HCxx series of
microcontrollers or all the SPI interface equipped sys-
tem controllers.
The devices have two superset features can be enabled
through the specific software instructions and Configu-
ration Register:
1. Configurable sector size: The memory array of
Pm25LV512A/010A are divided into uniform 4 Kbyte
sectors or uniform 32 Kbyte blocks (sector group -
consists of eight adjacent sectors). The memory ar-
ray of Pm25LV020/040 are divided into uniform 4
Kbyte sectors or uniform 64 Kbyte blocks (sector
group - consists of sixteen adjacent sectors).
2. The Pm25LV010A/020/040 have an option to config-
ure the 4 Kbyte bottom sector (Sector 0) into four 1
Kbyte smaller sectors (Sector 0_0, Sector 0_1, Sec-
tor 0_2 and Sector 0_3). The finer granularity sector
size architecture allows user to update data more
efficiently. This feature allows user to eliminate the
need of addtional serial EEPROM.
Refer to Table 1 for Configuration Register and Table 2
for Configuration Register Bit Definition.
Table 1. Configuration Register Format - Pm25LV010A/020/040
Bit 7
X
Bit 6
X
Bit 5
X
Bit 4
SP0_3
Bit 3
SP0_2
Bit 2
SP0_1
Bit 1
SP0_0
Bit 0
SCFG
Table 2. Configuration Register Bit Definition
Bit Name
Bit 0
SCFG
Bit 1
SP0_0
Bit 2
SP0_1
Bit 3
SP0_2
Bit 4
SP0_3
Bit 5 - 6 RES
Bit 7
RES
Definition
Sector Configuration:
"0" indicates the bottom sector is one 4 Kbyte sector (default)
"1" indicates the bottom sector is broken down to four 1 Kbyte sectors
This feature can be implemented only when BP0,BP1&BP2 of status
register were enabled to "1" which is in protection mode.
1 Kbyte Sector 0_0 Protection:
"0" indicates sector protection is disabled (default)
"1" indicates sector protection is enabled
1 Kbyte Sector 0_1Protection:
"0" indicates sector protection is disabled (default)
"1" indicates sector protection is enabled
1 Kbyte Sector 0_2 Protection:
"0" indicates sector protection is disabled (default)
"1" indicates sector protection is enabled
1 Kbyte Sector 0_3 Protection:
"0" indicates sector protection is disabled (default)
"1" indicates sector protection is enabled
Reserved for future (don't care)
Reserved for future (don't use)
Read/Write
R/W
R/W
R/W
R/W
R/W
N/A
N/A
Chingis Technology Corporation
6 Issue Date: Feb., 2009, Rev: 3.5

6 Page



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共有リンク

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部品番号部品説明メーカ
PM25LV020

(PM25LV010 / 020 / 040) Serial Flash Memory

PMC
PMC
Pm25LV020

Serial Flash Memory

Programmable Microelectronics
Programmable Microelectronics


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