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RT9807 の電気的特性と機能

RT9807のメーカーはRichtek Technology Corporationです、この部品の機能は「Micro-Power Voltage Detector」です。


製品の詳細 ( Datasheet PDF )

部品番号 RT9807
部品説明 Micro-Power Voltage Detector
メーカ Richtek Technology Corporation
ロゴ Richtek Technology Corporation ロゴ 




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RT9807 Datasheet, RT9807 PDF,ピン配置, 機能
RT9807
Micro-Power Voltage Detector with Manual Reset
General Description
The RT9807 is a micro-power voltage detector with
deglitched manual reset input which supervises the power
supply voltage level for microprocessors (μP) or digital
systems. It provides internally fixed threshold levels
ranging from 1.2V to 3.3V with 0.1V per step, which covers
most digital applications. It features low supply current of
3μA.
The RT9807 performs supervisory function by sending out
a reset signal whenever the VDD voltage falls below a
preset threshold level. The timeout period of this reset
signal can be adjusted via an external capacitor. Once
VDD recovers above the threshold level, the reset signal
will be released after a certain delay time. To manually
pull reset signal low, just pull the manual reset input (MR)
below the specified logic-low level.
The RT9807 is available in an SOT-23-5 package.
Features
z Monitor System Voltages from 0.9V to 5.5V
z Capacitor-Adjustable Reset Timeout Period
z Manual Reset Input
z Low Quiescent Current
z High Accuracy ±1.5%
z Low Functional Supply Voltage 0.9V
z N-Channel Open-Drain Output
z Small SOT-23-5 Package
z RoHS Compliant and Halogen Free
Applications
z Computers
z Controllers
z Intelligent Instruments
z Critical uP and uC Power Monitoring
z Portable/Battery-Powered Equipment
Ordering Information
RT9807-
Package Type
B : SOT-23-5
Pin Configurations
(TOP VIEW)
VDD
CT
54
Lead Plating System
G : Green (Halogen Free and Pb Free)
23
Output Voltage
12 : 1.2V
13 : 1.3V
RST GND MR
SOT-23-5
Note :
:
32 : 3.2V
33 : 3.3V
Typical Application Circuit
R
470k
Richtek products are :
`RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
VDD
5
CIN
RT9807
VDD
RST
1
1uF
Reset
`Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
3 MR GND CT 4
2
CCT
10nF
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
DS9807-01 April 2011
www.richtek.com
1

1 Page





RT9807 pdf, ピン配列
RT9807
Electrical Characteristics
(TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Operating VDD Range
Supply Current
VDD
IDD VTH = 3V, VDD = 4.5V
Reset Threshold
Threshold Voltage Accuracy
Threshold Voltage Hysteresis
Reset Threshold Tempco
VTH
ΔVTH
VHYS
VDD Drop to Reset Delay
RST Output Voltage Low
(Note 5)
tRP Drop = VTH – 250mV
VOL VDD < VTH(min.), ISINK = 3.5mA
MR Input
Logic-High
Threshold voltage Logic-Low
VIH
VIL
MR Glitch Rejection
MR to Reset Propagation Delay tMR
MR Pull-up Resistance
RMR
Reset Timeout Period
tRP
CCT = 1500pF
CCT = 0pF
CT Source Current
IRAMP
CT Source Threshold Voltage VTH-RAMP
CT Threshold Hysteresis
Min
0.9
--
1.2
1.5
--
--
--
--
0.7VDD
--
--
--
--
3.35
--
--
--
--
Typ
--
3
--
--
50 x VTH
100
100
Max
5.5
5
3.3
1.5
--
--
--
Unit
V
μA
V
%
mV
ppm/°C
μs
-- 0.4 V
--
--
80
2
20
4.375
0.275
240
0.65
33
--
0.25VDD
--
--
--
5.40
--
--
--
--
V
ns
μs
kΩ
ms
nA
V
mV
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a low effective thermal conductivity test board of JEDEC 51-3
thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. The voltage VOL can be calculated by VOL = VDD - Ir x R. Where R is the pull-up resistor and Ir is the current flowing through
the pull-up resistor. For typical application R = 100kΩ, VOL is less than 0.2V.
DS9807-01 April 2011
www.richtek.com
3


3Pages


RT9807 電子部品, 半導体
RT9807
Interfacing to Other Voltages
The RT9807 is an open-drain voltage detector that can
provide different voltage level of reset signals for processor
application. As shown in Figure 4, the open-drain output
can be connected to another voltage level less than 5.5V.
This allows for easy logic compatibility to various
microprocessors.
5V
5V
System
RST
470k
RT9807
RST
VDD
3.3V
1µF
GND
Figure 4
Manual Reset Input
Many processor based products require manual reset
capability, allowing the user or external logic circuitry to
initiate a reset. A logic low on MR asserts reset. Reset
remains asserted while MR is low and for the reset timeout
period after MR returns high. Connect a normally open
momentary switch from MR to ground to create a manual
reset function.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = ( TJ(MAX) TA ) / θJA
where TJ(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
the RT9807, the maximum junction temperature is 125°C.
The junction to ambient thermal resistance θJA is layout
dependent. For SOT-23-5 package, the thermal resistance
θJA is 250°C/W on the standard JEDEC 51-3 single layer
thermal test board. The maximum power dissipation at
www.richtek.com
6
TA = 25°C can be calculated by the following formula :
PD(MAX) = (125°C 25°C) / (250°C/W) = 0.4W for
SOT-23-5 package
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA. For RT9807 package, the derating curve
in Figure 5 allows the designer to see the effect of rising
ambient temperature on the maximum power dissipation.
0.50
Single Layer PCB
0.45
0.40
0.35
0.30
0.25
0.20
SOT-23-5
0.15
0.10
0.05
0.00
0
25 50 75 100
Ambient Temperature (°C)
125
Figure 5. Derating Curve for RT9807 Package
Layout Considerations
CT is a precise current source. When developing the
layout for the application, be careful to minimize board
capacitance and leakage currents around this pin.
Traces connected to CT should be kept as short as
possible. Traces carrying high-speed digital signals and
traces with large voltage potentials should be routed as
far from CT as possible. Leakage current and stray
capacitance (e.g., a scope probe) at this pin can cause
errors in the reset delay time.
R
RST 1
GND
SW MR
2
3
5 VDD
GND
4 CT
CIN
CCT
CCT should be placed as
close as possible to the IC.
Figure 6. PCB Layout Guide
DS9807-01 April 2011

6 Page



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