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PDF FZE1658G Data sheet ( Hoja de datos )
| Número de pieza | FZE1658G | |
| Descripción | 8 x Digital Sensor Interface | |
| Fabricantes | Siemens Semiconductor Group | |
| Logotipo |  |
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8 x Digital Sensor Interface
FZE 1658G
Features
q Input protection against 2000 V burst/500 V surge
pulse according to IEC 801 4/5
q Input characteristic according to IEC 65 A, type 2
(24 V DC)
q Digital filter
q Serial in/out for easy cascading
q Low power dissipation
q SMD package
P-DSO-24-1
Type
FZE 1658G
Ordering Code
Q67000-A8361
Package
P-DSO-24-1
The FZE 1658G is an integrated interface for digital sensors - i.e. proximity switches - in
industrial automation equipment. The IC has eight integrated highly protected and
failsafe inputs with status LED and a serial synchronous output for direct MC-interfacing.
Semiconductor Group
1
01.97
1 page  
FZE 1658G
Circuit Description
In IEC 65A, the following values are specified for 24-VDC input stages of type 2:
Level
1
0
Input Voltage
min. 11 V
max. 11 V
or max. 5 V
Input Current
min. 6 mA
max. 2 mA
The current in the input circuit is determined by the switching element in state “0” and by
characteristics of the input stage in state “1”.
The octal input device FZE 1658G is intended for a configuration comprising two
specified external resistors per channel, as shown in the block diagram. As a result the
power dissipation within the P-DSO-24-1 package is at a minimum.
The voltage dependent current through the external resistor REXT is compensated by a
negative differential resistance of the current sink across pins E and L, therefore input D
behaves like a constant current sink.
The comparator assigns level 1 or 0 to the voltage present at input E. To improve
interference protection, the comparator is provided with hysteresis and a delay element.
A status LED is connected in series with the input circuit (REXT and current sink). The
LED drive short-circuits the status LED if the comparator detects “0”. A constant current
sink in parallel with the LED reduces the operating current of the LED, and a voltage
limiter ensures that the input circuit remains operational if the LED is interrupted. The
specified switching thresholds may change if the LED is interrupted.
For each channel a digital filter is provided which samples the comparator signal at a rate
provided by the clock oscillator. The digital filter is designed as a 5-section shift register.
If any four out of 5 sampling values are identical, the output S changes to the
corresponding state.
On a falling edge at input LO-N, the parallel data S0 - S7 are clocked into the output shift
register. The data can be shifted out serially to the output SO-N by the clock signal T,
with a “1” at the input being represented by a L-signal at the output SO-N. The serial
interface of the shift register fits the synchronous interface of the 8051 microcontroller
(see diagram Serial Data Output Function). By connecting output SO-N to input SE-
N of the next device, several FZE 1658G can be cascaded (see Application Circuit).
SO-N is designed as an open-drain output. SE-N has an internal pull-up current source.
Inputs SE-N, T and SO-N have Schmitt trigger characteristics. The device has separate
ground pins for the input circuitry (GND) and for the logic (DGND). If the supply voltage
falls below VUSR or CT is connected to DGND, the output shift register will be cleared and
the output SO-N disabled. If the supply voltage is too low, the LED drives will also be
disabled, i.e. the LED lights as soon as current flows in the input circuit.
Semiconductor Group
5
5 Page 
FZE 1658G
Characteristics (cont’d)
VS = 15 V to 30 V; VDGND = 0, Tj = – 25 °C < Tj < 125 °C
Parameter
Symbol
Limit Values
Unit Test Condition Test
min. typ. max.
Circuit
5-V Logic
Input current II – 10
T, LO-N
10 µA Vi = 0 … 5 V 1
Input current SE-N IISE
Input current
T, LO-N, SE-N
II0
Input capacitance
L-output current
SO-N
CI
ISOL
– 600
0
5.5
– 400 µA
20 µA
10 pF
Vi = 0 … 3 V
Vi = 0 … 5 V
VS = 0 V
8 mA VQ = 3 … 5 V
1
1
1
1
L-output level SO-N VSOL
H-leakage current ISOH
SO-N
0
0
0.5 V ISO = 2 mA
50 µA VSO = 5 V
1
1
Output
CSOH
capacitance SO-N
20 pF VSO = 1.5 V
1
Rise/fall time of
output current
SO-N
trSO, tfSO
50 ns VSO = 2.5 V
1
Delay time
T to SO-N
(see timing
diagram)
tSOT
150 ns VSO = 2.5 V
1
Delay time
LO-N to SO-N
(see timing
diagram)
tSOLO
300 ns VSO = 2.5 V
1
Hysteresis SE-N,
LO-N
60 mV no 100% testing
Semiconductor Group
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet FZE1658G.PDF ] | |
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