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PDF ISL89367 Data sheet ( Hoja de datos )
| Número de pieza | ISL89367 | |
| Descripción | MOSFET Driver | |
| Fabricantes | Intersil | |
| Logotipo |  |
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High Speed, Dual Channel, 6A, MOSFET Driver With
Programmable Rising and Falling Edge Delay Timers
ISL89367
The ISL89367 is a high-speed, 6A, 2 channel MOSFET driver
optimized for synchronous rectifier applications. Internal timers
can be programmed with resistors to delay the rising and/or
falling edges of the outputs. Logically ANDed dual inputs are also
provided. One input is for the PWM signal and the second can be
used as an enable. A third control input is used to optionally
invert the logical polarity of the driver outputs.
Comparator like logical inputs allows this driver to be configured
for any logic level from 3.3V to 10 VDC. The precision logic
thresholds provided by the comparators allow the use of external
RC circuits to generate longer time delays than are possible with
the internal timers. The comparators also allow the driver to be
configured with a low output voltage that is negative relative to
the logic ground if desired. This is useful for applications that
require a negative turn-off gate drive voltage for driving FETs with
logic thresholds.
At high switching frequencies, these MOSFET drivers use very
little bias current. Separate, non-overlapping drive circuits are
used to drive each CMOS output FET to prevent shoot-thru
currents in the output stage.
The start-up sequence is design to prevent unexpected glitches
when VDD is being turned on or turned off. When VDD < ~1V, an
internal 10kΩ resistor between the output and ground helps to
keep the output voltage low. When ~1V < VDD < UV, both outputs
are driven low with very low resistance and the logic inputs are
ignored. This insures that the driven FETs are off. When
VDD > UVLO, and after a short delay, the outputs now respond to
the logic inputs.
Features
• 2 outputs with 6A peak drive currents (sink and source) with
output voltage range of 4.5V to 16V
• Typical ON-resistance <1Ω
• Specified Miller plateau drive currents
• EPAD provides very low thermal impedance (θJC = 3°C/W)
• Dual logic inputs with hysteresis for high noise immunity
• Rising and/or falling output edge delays programmed with
resistors
• 20ns rise and fall time driving a 10nF load
• Flexible logic options available by use of INVA and INVB pins
Applications
• Synchronous Rectifier (SR) Driver
• Switch mode power supplies
• Motor Drives, Class D amplifiers, UPS, Inverters
• Pulse Transformer Driver
• Clock/Line Driver
Related Literature
• AN1603 “ISL6752/54EVAL1Z ZVS DC/DC Power Supply with
Synchronous Rectifiers User Guide”
3.3V
ENABLE VREF+
INVA
PWM
INVB
VREF-
FDELA
RDELA
/OUTA
OUTB
GND
RDELB
FDELB
12V
FIGURE 1. TYPICAL APPLICATION
350
300
250 +125°C (WORST CASE)
200
150
+25°C (TYPICAL)
100
50 -40°C (WORST CASE)
00 5 10 15
RDT (2k TO 20k)
FIGURE 2. PROGRAMMABLE TIME DELAYS
20
October 8, 2012
FN7727.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011, 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL89367
DC Electrical Specifications VDD = 12V, GND = 0V, No load on OUTA or OUTB, RDELA = RDELB = FDELA = FDELB = 0kΩ unless
otherwise specified. Boldface limits apply over the operating junction temperature range, -40°C to +125°C. (Continued)
PARAMETERS
INPUTS
SYMBOL
TEST CONDITIONS
TJ = +25°C
MIN MAX
(Note 9) TYP (Note 9)
TJ = -40°C to +125°C
MIN
(Note 9)
MAX
(Note 9)
UNITS
Input Range for
IN1A, IN2A, IN1B, IN2B
VIN VIN is referenced to VREF-
-
-
-
Vref-
Vref+
V
Input Range for INVA, INVB
Logic 0 Threshold for IN1A,
IN2A, IN1B, IN2B
VINV VINV is referenced to VSS
VIL Nominally 37% x ((VREF+) - (VREF-))
- - - VSS VDD V
- 37 - 34 40 %
Logic 1 Threshold for IN1A,
IN2A, IN1B, IN2B
VIH Nominally 63% x ((VREF+) - (VREF-))
- 63 - 60 66 %
Logic 0 Threshold for INVA,
INVB
VILV VILV is referenced to VSS
- 0.9 - 1 1.2 V
Logic 1 Threshold for INVA,
INVB
VIHV VIHV is referenced to VSS
- 1.5 - 1.5 1.7 V
Input Capacitance of IN1A,
IN2A, IN1B, 1N2B, INVA, INVB
CIN
-2-
-
- pF
Input Bias Current for
IN1A, IN2A, IN1B, IN2B
IIN VREF- < VIN < VREF+
- - - -10 +10 µA
Input Bias Current for
INVA, INVB
OUTPUTS
IINV VSS < VINV < VDD
- - - -40 +40 µA
High Level Output Voltage
VOHA VOHB
- - - VDD - 0.1 VDD V
Low Level Output Voltage
VOLA
VOLB
---
GND GND + 0.1 V
Peak Output Source Current
IO VO (initial) = 0V, CLOAD = 10nF
- -6 -
-
-A
Peak Output Sink Current
IO VO (initial) = 12V, CLOAD = 10nF
- +6 -
-
-A
NOTES:
9. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
10. This parameter is taken from the simulation models for the input FET. The actual capacitance on this input will be dominated by the PCB parasitic
capacitance.
11. A 400µs delay further inhibits the release of the output state when the UV positive going threshold is crossed. See Figure 9.
12. The true state of a specific part number is defined by the input logic symbol.
AC Electrical Specifications VDD = 12V, GND = 0V, No Load on OUTA or OUTB, RDELA = RDELB = FDELA = FDELB = 0kΩ unless
otherwise specified. Boldface limits apply over the operating junction temperature range, -40°C to +125°C.
PARAMETERS
SYMBOL
TEST CONDITIONS
/NOTES
TJ = +25°C
MIN MAX
(Note 9) TYP (Note 9)
TJ = -40°C
to +125°C
MIN MAX
(Note 9) (Note 9)
UNITS
Output Rise Time (see Figure 4)
tR CLOAD = 10nF,
10% to 90%
- 20 -
- 40 ns
Output Fall Time (see Figure 4)
tF CLOAD = 10nF,
90% to 10%
- 20 -
- 40 ns
Output Rising Edge Propagation Delay (see Figure 3)
tRDLYA,
tRDLYB
- 25 -
- 50 ns
5 FN7727.1
October 8, 2012
5 Page 
ISL89367
Ra Rb
SIGNAL
SOURCE
Q1 C
VREF+
INVA
IN1A
IN2A
VDD
FDELA
RDELA
OUTA
ISL89367
only section A is shown
VREF-
VSS
SIGNAL
SOURCE
IN2A
OUTA
FIGURE 18. FALLING OUTA TIME DELAY
Figure 18 is used to delay the falling edge of OUTx. In this case
the rising time constant is Rb x C.
Logic States
The combinational control logic of the ISL89367 is very flexible.
The state of OUTx is the ANDed logic of both inputs, IN1x and
IN2x. The INVx input to the exclusive-OR gate is used to invert the
logic state of OUTx. Frequently, for SR applications, it is desirable
to have a logic control that can force OUTA = 0 for the purpose of
diode emulation. This “enable” control input can be either of the
IN1x or IN2x inputs of one channel. In Figure 1 on page 1, IN1A is
used as the enabled input for channel A. When this input is tied
to VREF+, OUTA follows the state of IN2x. If INA1 is connected to
VREF-, with INVA = 0, OUTA remains low no matter what state
IN2A is in.
Paralleling Outputs to Double the Peak Drive
Currents
The typical propagation matching of the ISL89367 is less than
1ns. Note that the propagation matching is only valid when
FDELA = RDELA = 0kΩ and FDELB = RDELB = 0kΩ. The matching
is so precise that carefully matched and calibrated scopes
probes and scope channels must be used to make this
measurement. Because of this excellent performance, these
driver outputs can be safely paralleled to double the current drive
capacity. It is important that the INA and INB inputs be
connected together on the PCB with the shortest possible trace.
This is also required of OUTA and OUTB.
Power Dissipation and Die Temp
The following is an example of how to calculate the power
dissipated by the ISL89367 driver. These calculations are
intended to give an approximate temperature rise of the die
junction. Because operating conditions such as air flow can
influence the actual temperatures, it is absolutely necessary to
confirm the operating temperatures in a specific application by
measuring the ISL89367 temperatures with an infra-red
temperature sensor or camera. Using a thermal couple to
measure the temperature of small devices is not recommended
because the thermal couple wire will act as a heat sink reducing
the temperature of the measured device to values less than what
will actually occur. See Tech Brief TB379 for more information.
12
ID = 12A
10
8
VDS = 0V
VDS = 64V
6 VDS = 40V
4
2
0
0 2 4 6 8 10 12 14 16 18 20 22 24
QG, TOTAL GATE CHARGE (nC)
FIGURE 19. CHARGE OF A TYPICAL MOSFET
Figure 19 illustrates how the gate charge varies with gate
voltage, VGS, and the VDS of the driven MOSFET. Because an SR
is switched on and off when VDS = 0 and if we use VGS = 12V,
from the graph, QG = 13.5nC. In this example the dissipation of
the driver with frequency = 1MHz is shown by Equation 2:
Pgate = 2 × Qg × freq × VGS
= 2 × 17nC × 1MHz × 12
= 0.408W
(EQ. 2)
Notice that the dissipation of the driver is not a function of the
peak drive rating of the driver. Also if an external gate resistor is
used to limit the peak current output, the dissipation is
proportionally shared between the value of the gate resistor and
the rDS(ON) of the ISL89367 output.
Another parameter that must be considered is the dissipation
resulting from the bias current at the frequency of operation. For
the ISL89367 the bias current @ VDD = 12V and 1MHz is 24mA.
Pbias = VDS × Ibias = 12V × 24mA = 0.288W
(EQ. 3)
Ptotal = Pgate + Pbias + 0.408W + 0.288W = 0.696W
The Thermal impedances of the ISL89367 are:
(EQ. 4)
θJC = 3°C/W
θJA = 36°C/W
The temperature rise is:
TriseJC = θJC × Ptotal = 2.09ΔC
(EQ. 5)
TriseJC is the temperature rise referenced to the temperature of
the PCB ground plane under the part.
TriseJA = θJA × Ptotal = 25ΔC
(EQ. 6)
In this example the temperature rise is relatively small for θJC
and θJA. Obviously the ISL89367 could drive significantly larger
FETs than what is used in this example.
Output Current Rating
While the ISL89367 has a very high peak output current rating of
6A sourcing and sinking, there are limitations to the average
output current. With the high peak output current of the
ISL89367, it is tempting to use the driver as a general purpose
switch to drive loads that are not capacitive as are the gates of
MOSFETs. It is important to note that the maximum average
output current rating of the ISL89367 of 150mA must not be
11 FN7727.1
October 8, 2012
11 Page | ||
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| PDF Descargar | [ Datasheet ISL89367.PDF ] | |
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