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ISL89367 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 ISL89367
部品説明 MOSFET Driver
メーカ Intersil
ロゴ Intersil ロゴ 



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ISL89367 Datasheet, ISL89367 PDF,ピン配置, 機能
High Speed, Dual Channel, 6A, MOSFET Driver With
Programmable Rising and Falling Edge Delay Timers
ISL89367
The ISL89367 is a high-speed, 6A, 2 channel MOSFET driver
optimized for synchronous rectifier applications. Internal timers
can be programmed with resistors to delay the rising and/or
falling edges of the outputs. Logically ANDed dual inputs are also
provided. One input is for the PWM signal and the second can be
used as an enable. A third control input is used to optionally
invert the logical polarity of the driver outputs.
Comparator like logical inputs allows this driver to be configured
for any logic level from 3.3V to 10 VDC. The precision logic
thresholds provided by the comparators allow the use of external
RC circuits to generate longer time delays than are possible with
the internal timers. The comparators also allow the driver to be
configured with a low output voltage that is negative relative to
the logic ground if desired. This is useful for applications that
require a negative turn-off gate drive voltage for driving FETs with
logic thresholds.
At high switching frequencies, these MOSFET drivers use very
little bias current. Separate, non-overlapping drive circuits are
used to drive each CMOS output FET to prevent shoot-thru
currents in the output stage.
The start-up sequence is design to prevent unexpected glitches
when VDD is being turned on or turned off. When VDD < ~1V, an
internal 10kresistor between the output and ground helps to
keep the output voltage low. When ~1V < VDD < UV, both outputs
are driven low with very low resistance and the logic inputs are
ignored. This insures that the driven FETs are off. When
VDD > UVLO, and after a short delay, the outputs now respond to
the logic inputs.
Features
• 2 outputs with 6A peak drive currents (sink and source) with
output voltage range of 4.5V to 16V
• Typical ON-resistance <1
• Specified Miller plateau drive currents
• EPAD provides very low thermal impedance (θJC = 3°C/W)
• Dual logic inputs with hysteresis for high noise immunity
• Rising and/or falling output edge delays programmed with
resistors
• 20ns rise and fall time driving a 10nF load
• Flexible logic options available by use of INVA and INVB pins
Applications
• Synchronous Rectifier (SR) Driver
• Switch mode power supplies
• Motor Drives, Class D amplifiers, UPS, Inverters
• Pulse Transformer Driver
• Clock/Line Driver
Related Literature
AN1603 “ISL6752/54EVAL1Z ZVS DC/DC Power Supply with
Synchronous Rectifiers User Guide”
3.3V
ENABLE VREF+
INVA
PWM
INVB
VREF-
FDELA
RDELA
/OUTA
OUTB
GND
RDELB
FDELB
12V
FIGURE 1. TYPICAL APPLICATION
350
300
250 +125°C (WORST CASE)
200
150
+25°C (TYPICAL)
100
50 -40°C (WORST CASE)
00 5 10 15
RDT (2k TO 20k)
FIGURE 2. PROGRAMMABLE TIME DELAYS
20
October 8, 2012
FN7727.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011, 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

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