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3938 の電気的特性と機能

3938のメーカーはAllegro MicroSystemsです、この部品の機能は「THREE PHASE POWER MOSFET CONTROLLER」です。


製品の詳細 ( Datasheet PDF )

部品番号 3938
部品説明 THREE PHASE POWER MOSFET CONTROLLER
メーカ Allegro MicroSystems
ロゴ Allegro MicroSystems ロゴ 




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3938 Datasheet, 3938 PDF,ピン配置, 機能
3938
PRELIMINARY DATASHEET - 11/07/02
(Subject to change without notice)
THREE PHASE POWER
MOSFET CONTROLLER
ABSOLUTE MAXIMUM RATINGS
( at TA = +25°C )
Load Supply Voltage, VBB............................ 50 V
VREG (Transient) ......................................... 15 V
Logic Input Voltage Range,
VIN................... -0.3 V to VLCAP + 0.3 V
Sense Voltage, VSENSE .........................-5 to 1.5 V
Pins SA/SB/SC, ....................................-5 to 50 V
Pins GHA/GHB/GHC ................ -5 to VBB + 17 V
Pins CA/CB/CC .........................SA/SB/SC+17 V
Operating Temperature Range,
TA ................................ -20°C to +85°C
Junction Temperature, TJ ......................... +150°C
Storage Temperature Range,
TS .............................. -55°C to +150°C
Thermal Impedances, typ. (TA = +25°C)*
A3938SEQ, RØJA ..................................... 37 °C/W
A3938KLQ, RØJA..................................... 44 °C/W
* JEDEC High K board.
The A3938 is a three-phase, brushless, DC-motor controller. The
A3938’s high current gate drive capability allows driving of a wide range of
power MOSFETs and can support motor supply voltages to 50V. The A3938
integrates a bootstrapped high side driver to minimize the external
component count required to drive N-channel MOSFET drivers.
Internal, fixed, off-time, PWM, current-control circuitry can be
used to regulate the maximum load current to a desired value. The peak load
current limit is set by the user’s selection of an input reference voltage and
external sensing resistor. A user-selected external RC timing network sets the
fixed off-time pulse duration. For added flexibility, the PWM input can
provide speed/torque control where the internal current control circuit sets a
limit on the maximum current.
The A3938 includes Synchronous Rectification. This feature shorts
out the current path through the power MOSFET’s reverse body diodes
during PWM off cycle current decay. This can minimize power dissipation in
the MOSFETs, eliminate the need for external power clamp diodes, and
potentially allow a more economical choice for the MOSFET drivers.
The A3938 provides commutation logic for Hall sensors configured
for 120-degree spacing. The Hall input pins are pulled up to an internally
generated 5V reference. Power MOSFET protection features includes
bootstrap capacitor charging current monitor, regulator under-voltage
monitor, motor lead short-to-ground, and thermal shutdown.
The A3938 is available in a choice of two packages: a 32-pin,
rectangular PLCC suffix “EQ”; and 36-pin, QSOP, suffix “LQ”.
FEATURES
T Drives Wide Range of N-channel
MOSFETs
T Low-Side Synchronous Rectification
T Power MOSFET Protection
T Adjustable Dead-Time for Cross-
Conduction Protection
T Selectable coast or dynamic brake on
power-down or RESET input
T Fast/Slow Current Decay Modes
T Internal PWM Current Control
T Motor Lead Short-to-Ground
Protection
T Internal 5V Regulator
T Fault Diagnostic Output
T Thermal Shutdown
T Under-voltage Protection

1 Page





3938 pdf, ピン配列
3938 Three Phase MOSFET Controller
ELECTRICAL CHARACTERISTICS: Unless noted, otherwise: TA = 25°C, Vbb = 18 to 50 V, Clcap, Cboot = 0.1 uF,
Cvreg = 10 uF, PWM = 22.5 kHz sq. wave, two phases active. Typ. values for design use, only. Negative current flows out
of designated pin.
Characteristics
Quiescent Current
LCAP Regulator
VREG =VBB Supply Voltage Range
VREG Output Voltage
VREG Load Regulation
VREG Line Regulation
Control Logic
Logic Input Voltage
Logic Input Current
Gate Drive
Low side drive, output high
High side drive, output high
Pull Up Switch Resistance
Pull Down Switch Resistance
Low side switching, 10/90 rise time
Low side switching, 10/90 fall time
High side switching, 10/90 rise time
High side switching, 10/90 fall time
Prop. Delay, GHx,GLx rising
Prop. Delay, GHx,GLx falling
Dead time, maximum
Dead time, minimum
Symbol Test Conditions
IVBB
VLCAP
VREG
VREG
VREGLOAD
RESET = 1, Coast mode, Stopped.
Ilcap = -3.0 mA
VREG =VBB, observe max. rating = 15 V
VBB = 13.2 to 18 V, Ivreg = -10 mA.
VBB = 18 to 50V, Ivreg = -10 mA.
Ivreg = -1 to -30 mA, Coast.
VREGLIN Ivreg = -10 mA, Coast.
Min.
4.75
10.8
12.4
Typ. Max.
8.0
5 5.25
– 13.2
VBB-2.5
13
13.6
25
40 –
Units
mA
V
V
V
V
mV
mV
VIN(1)
VIN(0)
IIN(1)
IIN(0)
Minimum High Level for Logical (1)
Maximum Low Level for Logical (0)
VIN = 2.0 V
VIN = 0.8 V
2.0 – – V
– – 0.8 V
-30 -90 µA
-50
-130
µA
VHGL
VHGH
RDS(ON)
RDS(ON)
trGL
tfGL
trGH
tfGH
Tpr
Tpf
tDEAD
tDEAD
Igx = 0
Igx = 0
Igx = - 50mA
Igx = 50mA
Cload = 3300 pF
Cload = 3300 pF
Cload = 3300 pF
Cload = 3300 pF
PWM to Gate Drive Out. Cload = 3300 pF
PWM to Gate Drive Out. Cload = 3300 pF
IDEAD = 10µA, GHx to GLx, Cload =3300 pF.
IDEAD = 780µA, GLx to GHx, Cload =3300 pF.
VREG-.8 VREG-.5
10.4 11.6
14
4
– 120
– 60
– 120
– 60
- 220
- 110
– 5500
– 100
12.8
-
-
V
V
ns
ns
ns
ns
nS
nS
ns
ns


3Pages


3938 電子部品, 半導体
3938 Three Phase MOSFET Controller
PIN DESCRIPTIONS (continued)
VREG. Regulated 13 V supply for low-side gate drive and
bootstrap capacitor charge circuit. As a regulator, use 10 uF
decoupling/storage capacitor (ESR < 1 ohm) from this pin to
AGND, as close to the device pins as possible. Some
auxiliary external load current may be drawn, if desired,
depending on what is left over from that required by bridge
FETs and PWM freq. Pin should be shorted to VBB for 12V
applications.
VBB. Motor power supply connection for A3938 and power
MOSFETs. Pin should be shorted to VREG for 12V
applications. It is good practice to connect a decoupling
capacitor from this pin to AGND, as close to the device pins
as possible.
REF. Analog input to current limit comparator. Voltage
applied here sets the peak load current according to the
equation: ITRIP = VREF/RSENSE.
LCAP. 5V reference to power internal logic and low
current for Dead-time pin and FAULT pin. Connection for
0.1 uF external capacitor for decoupling.
DEAD. Analog input. A resistor between DEAD and LCAP
is selected to adjust turn-off to turn-on time. This
delay is needed to prevent cross-conduction in the external
power FETs. The resistor allowable range is 5.6k to 470k,
which converts to control logic dead-time of 100 nS to 5.5
uS.
TDEAD 11e-12 * (RDEAD + 500)
Gate driver dead-times will depend on Gate Driver RC
loading, as well.
SENSE. Analog input to the current limit comparator.
Voltage representing load current appears on this pin.
Voltage transients seen at this pin when the drivers turn on
are ignored for time, TBLANK.
AGND. Analog reference ground.
PGND. Return for low-side gate drivers. This should be
connected to PCB power ground.
Commutation Truth Table
H1 H2 H3 DIR GLA GLB GLC GHA GHB GHC SA SB SC
101
1
0
0
1
1
0
0
HI
Z LO
100
1
0
0
1
0
1
0
Z
HI LO
110
1
1
0
0
0
1
0
LO HI
Z
010
1
1
0
0
0
0
1
LO
Z
HI
011
1
0
1
0
0
0
1
Z LO HI
001
1
0
1
0
1
0
0
HI LO Z
101
0
1
0
0
0
0
1
LO
Z
HI
100
0
0
1
0
0
0
1
Z LO HI
110
0
0
1
0
1
0
0
HI LO Z
010
0
0
0
1
1
0
0
HI
Z LO
011
0
0
0
1
0
1
0
Z
HI LO
001
0
1
0
0
0
1
0
LO HI
Z
INPUT LOGIC
MODE
0
0
1
1
X
PWM
0
1
0
1
X
RESET
0
0
0
0
1
Quadrant
Fast decay
Fast Decay
Slow decay
Slow Decay
X
Mode of Operation
PWM chop – current decay with opposite of selected drivers ON
Peak Current limit – selected drivers ON
PWM chop – current decay with both Low side drivers ON
Peak Current limit – selected drivers ON
All gate drive outputs to 0V – Clear fault logic (BRKSEL=0)

6 Page



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共有リンク

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