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PDF 74HC541 Data sheet ( Hoja de datos )
| Número de pieza | 74HC541 | |
| Descripción | Octal buffer/line driver | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74HC541; 74HTC541
Octal buffer/line driver; 3-state
Rev. 3 — 15 April 2014
Product data sheet
1. General description
The 74HC541; 74HCT541 is an octal non-inverting buffer/line driver with 3-state outputs.
The device features two output enables (OE1 and OE2). A HIGH on OEn causes the
outputs to assume a high-impedance OFF-state. Inputs include clamp diodes that enable
the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Non-Inverting outputs
Complies with JEDEC standard no. 7A
Input levels:
For 74HC541: CMOS level
For 74HCT541: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74HC541N
40 C to +125 C
74HCT541N
74HC541D
40 C to +125 C
74HCT541D
74HC541DB 40 C to +125 C
74HCT541DB
74HC541PW 40 C to +125 C
74HCT541PW
Name
DIP20
SO20
SSOP20
TSSOP20
Description
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads;
body width 7.5 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
Version
SOT146-1
SOT163-1
SOT339-1
SOT360-1
1 page  
NXP Semiconductors
74HC541; 74HTC541
Octal buffer/line driver; 3-state
5. Pinning information
5.1 Pinning
+&
+&7
2(
$
$
$
$
$
$
$
$
*1'
9&&
2(
<
<
<
<
<
<
<
<
DDD
Fig 5. Pin configuration DIP20, SO20 and (T)SSOP20
5.2 Pin description
Table 2.
Symbol
OE1
A0 to A7
GND
Y0 to Y7
OE2
VCC
Pin description
Pin Description
1 output enable input (active LOW)
2, 3, 4, 5, 6, 7, 8, 9
data input
10 ground (0 V)
18, 17, 16, 15, 14, 13, 12, 11 data output
19 output enable input (active LOW)
20 supply voltage
6. Functional description
Table 3.
Control
OE1
L
L
X
H
Functional table[1]
OE2
L
L
H
X
Input
An
L
H
X
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Output
Yn
L
H
Z
Z
74HC_HCT541
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
5 of 19
5 Page 
NXP Semiconductors
74HC541; 74HTC541
Octal buffer/line driver; 3-state
VI
negative
pulse
0V
VI
positive
pulse
0V
90 %
10 %
VM
10 %
tf
tr
90 %
VM
tW
tW
VM
tr
tf
VM
VI
G
VCC
DUT
RT
VO
VCC
RL S1
CL
open
001aad983
Fig 8.
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance
S1 = Test selection switch
Test circuit for measuring switching times
Table 9. Test data
Type
Input
74HC541
74HCT541
VI
VCC
3V
tr, tf
6 ns
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 k
1 k
S1 position
tPHL, tPLH
open
open
tPZH, tPHZ
GND
GND
tPZL, tPLZ
VCC
VCC
74HC_HCT541
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet 74HC541.PDF ] | |
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