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PDF ISL6617A Data sheet ( Hoja de datos )
| Número de pieza | ISL6617A | |
| Descripción | PWM Doubler | |
| Fabricantes | Intersil Corporation | |
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DATASHEET
PWM Doubler with Output Monitoring Feature
ISL6617A
The ISL6617A utilizes Intersil’s proprietary Phase Doubler
scheme to modulate two-phase power trains with single PWM
input. It doubles the number of phases that 3.3V multiphase
controllers can support.
The ISL6617A is designed to minimize the number of analog
signals that interface between the controller and drivers in high
phase count scalable applications. The common COMP signal,
which is usually seen in conventional cascaded configurations, is
not required; this improves noise immunity and simplifies the
layout. Furthermore, the ISL6617A provides low part count and
low cost advantage over the conventional cascaded technique.
By cascading the ISL6617A with another ISL6617 or ISL6611A, it
can quadruple the number of phases that 3.3V multiphase
controllers can support.
The ISL6617A also features tri-state input and outputs that
recognize a high-impedance state, working together with Intersil
multiphase PWM controllers and driver stages to prevent
negative transients on the controlled output voltage when
operation is suspended. This feature eliminates the need for the
Schottky diode that may be utilized in a power system to protect
the load from excessive negative output voltage damage.
Applications
• High current low voltage DC/DC converters
• High frequency and high efficiency VRM and VRD
• High phase count and phase shedding applications
• 3.3V PWM input integrated power stage or DrMOS
Features
• Proprietary phase doubler scheme
• Enhanced light to full load efficiency
• Double or quadruple phase count
• Patented current balancing with DCR current sensing and
adjustable gain
• Current monitoring output (IOUT) to simplify system interface
and layout
• Triple-level enable input for mode selection
• Dual PWM output drives for two synchronous rectified bridges
with single PWM input
• Channel synchronization and two interleaving options
• Support 3.3V PWM input
• Support 5V PWM output
• Tri-state PWM input and outputs for output stage shutdown
• Overvoltage protection
• Dual flat no-lead (DFN) package
- Near chip-scale package footprint; improves PCB utilization,
thinner profile
- Pb-free (RoHS compliant)
Related Literature
• TB363, “Guidelines for Handling and Processing Moisture
Sensitive Surface Mount Devices (SMDs)”
Phase Doubler Selection Guide
PART
NUMBER
ISL6617
ISL6617A
PWM
INPUT
5.0V
3.3V
PWM
OUTPUT
5.0V
5.0V
INTEGRATED
DRIVER
CASCADED DEVICES
COMPATIBLE CONTROLLERS
N/A 5.0V PWM DrMOS; ISL6336G, ISL6372/3/4/5/6, ISL6364/67/67H;
ISL6617, ISL6611A ISL6388/98 with 5V PWM Option
N/A 5.0V PWM DrMOS; 3.3V PWM Digital Controllers with Phase Doubler Compatibility;
ISL6617, ISL6611A ISL6388/98 with 3.3V PWM Option
ISL6611A
5V
N/A
5.0V Discrete MOSFET; ISL6336G, ISL6372/3/4/5/6, ISL6364/67/67H;
Dual FETS
ISL6388/98 with 5V PWM Option
December 19, 2014
FN7844.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6617A
Typical Application II (2-Phase Controller to 8-Phase Operation)
+3.3V
VSEN
VCC
+5V
+5V
VCC
PWMA
EN_SYNC
CSENA
CSRTNA
+5V
+5V
VCC
PWMA
EN_SYNC
+12V
POWER STAGE
VIN
PWM PHASE
GND
PWMIN
ISENA-
ISENA+
ISENB+
ISENB-
ISL6617
IOUT
PWMB
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
+VCORE
PWM0
CS0
CSRTN0
MAIN
CONTROL
ISL69xxx
PWMIN
ISL6617A
IOUT
CSENB
CSRTNB
PWMB
GND
+5V
+5V
VCC
PWMA
EN_SYNC
CSENA
CSRTNA
+5V
+5V
VCC
PWMA
EN_SYNC
IOUT
PWMIN
ISENA-
ISENA+
ISENB+
ISENB-
ISL6617
PWMB
GND
+12V
POWER STAGE
VIN
PWM PHASE
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
+5V
+5V
VCC
PWMA
EN_SYNC
+12V POWER STAGE
VIN
PWM PHASE
GND
PWMIN
ISENA-
ISENA+
ISENB+
ISENB-
ISL6617
IOUT
PWMB
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
PWM1
CS1
CSRTN1
GND
PWMIN
ISL6617A
IOUT
CSENB
CSRTNB
PWMB
GND
+5V
+5V
VCC
PWMA
EN_SYNC
IOUT
PWMIN
ISENA-
ISENA+
ISENB+
ISENB-
ISL6617
PWMB
GND
+12V
POWER STAGE
VIN
PWM PHASE
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
Submit Document Feedback
5
FN7844.0
December 19, 2014
5 Page 
ISL6617A
Current Sensing
The ISL6617A senses current continuously for fast response. The
ISL6617A supports inductor DCR sensing, or resistive sensing
techniques. The associated channel current sense amplifier uses
the ISEN inputs to reproduce a signal proportional to the inductor
current, IL. The sensed current, ISEN, is proportional to the
inductor current. The sensed current is used for current balance
and load-line regulation.
The internal circuitry (shown in Figures 10 and 11) represents
one channel. This circuitry is repeated for each channel in the
doubler. The input bias current of the current sensing amplifier is
typically 60nA; less than 5kΩ input impedance is preferred to
minimize the offset error. In addition, the common mode input
voltage to the amplifier should be less than VCC-3V.
INDUCTOR DCR SENSING
An inductor’s winding is characteristic of a distributed resistance,
as measured by the DCR (Direct Current Resistance) parameter.
Consider the inductor DCR as a separate lumped quantity, as
shown in Figure 10.
VIN
ILs
POWER
STAGE
L DCR
INDUCTOR
VL
VOUT
COUT
VC(s)
PWMA/B
RC
ISL6617A
IA/B
RISEN(A/B)
CURRENT
SENSE
+ CSEN(A/B)
-
CSRTN(A/B)
CT
ISEN = IL R--D---I-S-C---E-R--N--
FIGURE 10. DCR SENSING CONFIGURATION
The channel current IL, flowing through the inductor, will also
pass through the DCR. Equation 2 shows the s-domain
equivalent voltage across the inductor VL.
VLs = IL s L + DCR
(EQ. 2)
A simple R-C network across the inductor extracts the DCR
voltage, as shown in Figure 10.
The voltage on the capacitor VC, can be shown to be proportional
to the channel current IL. See Equation 3.
VCs
=
s D-----CL----R-- + 1 DCR IL
---------------------s-------R----C-----+-----1----------------------
(EQ. 3)
If the R-C network components are selected such that the RC
time constant matches the inductor time constant (RC = L/DCR),
the voltage across the capacitor VC is equal to the voltage drop
across the DCR, i.e., proportional to the channel current.
With the internal low-offset current amplifier, the capacitor
voltage VC is replicated across the sense resistor RISEN.
Therefore, the current out of ISEN+ pin, ISEN, is proportional to
the inductor current.
Because of the internal filter at ISEN- pin, one capacitor, CT, is
needed to match the time delay between the ISEN- and ISEN+
signals. Select the proper CT to keep the time constant of RISEN
and CT (RISEN x CT) close to 27ns.
Equation 4 shows that the ratio of the channel current to the
sensed current, ISEN, is driven by the value of the sense resistor
and the DCR of the inductor.
ISEN = IL R--D---I-S-C---E-R--N--
(EQ. 4)
RESISTIVE SENSING
For more accurate current sensing, a dedicated resistor RSENSE in
series with each output inductor can serve as the current sense
element (see Figure 11). This technique reduces overall converter
efficiency due to the additional power loss on the current sense
element RSENSE.
IL
L RSENSE VOUT
COUT
ISL6617A
IA/B
RISEN(A/B)
CURRENT
SENSE
+ CSEN(A/B)
-
CSRT(A/B)
CT
ISEN = IL -R---R-S----I-E-S---N-E----S-N---E---
FIGURE 11. SENSE RESISTOR IN SERIES WITH INDUCTORS
The same capacitor CT is needed to match the time delay between
ISEN- and ISEN+ signals. Select the proper CT to keep the time
constant of RISEN and CT (RISEN x CT) close to 27ns.
Equation 5 shows the ratio of the channel current to the sensed
current ISEN.
ISEN = IL R---R--S--I-E-S--N-E---SN---E--
(EQ. 5)
Submit Document Feedback 11
FN7844.0
December 19, 2014
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ISL6617A.PDF ] | |
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