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XQ7VX330T の電気的特性と機能

XQ7VX330TのメーカーはXilinxです、この部品の機能は「Virtex-7 T and XT FPGAs」です。


製品の詳細 ( Datasheet PDF )

部品番号 XQ7VX330T
部品説明 Virtex-7 T and XT FPGAs
メーカ Xilinx
ロゴ Xilinx ロゴ 




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XQ7VX330T Datasheet, XQ7VX330T PDF,ピン配置, 機能
DS183 (v1.21) July 1, 2014
Virtex-7 T and XT FPGAs Data Sheet:
DC and AC Switching Characteristics
Product Specification
Introduction
Virtex®-7 T and XT FPGAs are available in -3, -2, -1, and
-2L speed grades, with -3 having the highest performance.
The -2L devices operate at VCCINT = 1.0V and are screened
for lower maximum static power. The speed specification of
a -2L device is the same as the -2 speed grade. The -2G
speed grade is available in devices utilizing Stacked Silicon
Interconnect (SSI) technology. The -2G speed grade
supports 12.5 Gb/s GTX or 13.1 Gb/s GTH transceivers as
well as the standard -2 speed grade specifications.
Virtex-7 T and XT FPGA DC and AC characteristics are
specified in commercial, extended, industrial, and military
temperature ranges. Except for the operating temperature
range or unless otherwise noted, all the DC and AC
electrical parameters are the same for a particular speed
grade (that is, the timing characteristics of a -1M speed
grade military device are the same as for a -1C speed grade
commercial device). However, only selected speed grades
and/or devices are available in each temperature range.
All supply voltage and junction temperature specifications
are representative of worst-case conditions. The
parameters included are common to popular designs and
typical applications.
Available device and package combinations can be found in:
7 Series FPGAs Overview (DS180)
Defense-Grade 7 Series FPGAs Overview (DS185)
This Virtex-7 T and XT FPGA data sheet, part of an overall
set of documentation on the 7 series FPGAs, is available on
the Xilinx website at www.xilinx.com/7.
DC Characteristics
Table 1: Absolute Maximum Ratings(1)
Symbol
Description
FPGA Logic
VCCINT
VCCAUX
VCCBRAM
VCCO
Internal supply voltage
Auxiliary supply voltage
Supply voltage for the block RAM memories
Output drivers supply voltage for 3.3V HR I/O banks
Output drivers supply voltage for 1.8V HP I/O banks
VCCAUX_IO
VREF
Auxiliary supply voltage
Input reference voltage
I/O input voltage for 3.3V HR I/O banks
VIN(2)(3)(4)
I/O input voltage for 1.8V HP I/O banks
I/O input voltage (when VCCO = 3.3V) for VREF and differential I/O standards except
TMDS_33(5)
VCCBATT
Key memory battery backup supply
GTX and GTH Transceivers
VMGTAVCC
VMGTAVTT
VMGTVCCAUX
VMGTREFCLK
Analog supply voltage for the GTX/GTH transmitter and receiver circuits
Analog supply voltage for the GTX/GTH transmitter and receiver termination circuits
Auxiliary analog Quad PLL (QPLL) voltage supply for the GTX/GTH transceivers
GTX/GTH transceiver reference clock absolute input voltage
Min Max Units
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.40
–0.55
–0.40
1.1
2.0
1.1
3.6
2.0
2.06
2.0
VCCO + 0.55
VCCO + 0.55
2.625
V
V
V
V
V
V
V
V
V
V
–0.5 2.0
V
–0.5 1.1
–0.5 1.32
–0.5 1.935
–0.5 1.32
V
V
V
V
© 2011–2014 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Kintex, Artix, Zynq, Spartan, ISE, Vivado and other designated brands included herein are trademarks of Xilinx in the
United States and other countries. All other trademarks are the property of their respective owners.
DS183 (v1.21) July 1, 2014
Product Specification
www.xilinx.com
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XQ7VX330T pdf, ピン配列
Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics
Table 2: Recommended Operating Conditions(1)(2) (Cont’d)
Symbol
VCCBATT(11)
Battery voltage
GTX and GTH Transceivers
Description
VMGTAVCC(12)
Analog supply voltage for the GTX/GTH transceiver QPLL frequency range
10.3125 GHz(13)(14)
Analog supply voltage for the GTX/GTH transceiver QPLL frequency range
> 10.3125 GHz
VMGTAVTT(12)
Analog supply voltage for the GTX/GTH transmitter and receiver
termination circuits
VMGTVCCAUX(12) Auxiliary analog Quad PLL (QPLL) voltage supply for the transceivers
VMGTAVTTRCAL(12)
Analog supply voltage for the resistor calibration circuit of the GTX/GTH
transceiver column
XADC
VCCADC
VREFP
Temperature
XADC supply relative to GNDADC
Externally supplied reference voltage
Junction temperature operating range for commercial (C) temperature
devices
Junction temperature operating range for extended (E) temperature
Tj devices
Junction temperature operating range for industrial (I) temperature devices
Junction temperature operating range for military (M) temperature devices
Min
1.0
0.97
1.02
1.17
1.75
1.17
1.71
1.20
0
0
–40
–55
Typ
1.0
1.05
1.2
1.80
1.2
1.80
1.25
Max
1.89
1.08
1.08
1.23
1.85
1.23
1.89
1.30
85
100
100
125
Notes:
1. All voltages are relative to ground.
2. For the design of the power distribution system, consult the 7 Series FPGAs PCB Design and Pin Planning Guide (UG483).
3. VCCINT and VCCBRAM should be connected to the same supply.
4. For more information on the VID bit see the Lowering Power using the Voltage Identification Bit application note (XAPP555).
5. Configuration data is retained even if VCCO drops to 0V.
6. Includes VCCO of 1.2V, 1.35V, 1.5V, 1.8V, 2.5V (HR I/O only), 3.3V (HR I/O only) at ±5%.
7. For more information, refer to the VCCAUX_IO section of 7 Series FPGAs SelectIO Resources User Guide (UG471).
8. The lower absolute voltage specification always applies.
9. See Table 10 for TMDS_33 specifications.
10. A total of 200 mA per bank should not be exceeded.
11. VCCBATT is required only when using bitstream encryption. If battery is not used, connect VCCBATT to either ground or VCCAUX.
12. Each voltage listed requires the filter circuit described in the 7 Series FPGAs GTX/GTH Transceiver User Guide (UG476).
13. For data rates 10.3125 Gb/s, VMGTAVCC should be 1.0V ±3% for lower power consumption.
14. For lower power consumption, VMGTAVCC should be 1.0V ±3% over the entire CPLL frequency range.
Units
V
V
V
V
V
V
V
V
°C
°C
°C
°C
Table 3: DC Characteristics Over Recommended Operating Conditions
Symbol
Description
VDRINT
VDRI
IREF
IL
CIN(2)
Data retention VCCINT voltage (below which configuration data might be lost)
Data retention VCCAUX voltage (below which configuration data might be lost)
VREF leakage current per pin
Input or output leakage current per pin (sample-tested)
Die input capacitance at the pad
Min
0.75
1.5
Typ(1)
Max
15
15
8
Units
V
V
µA
µA
pF
DS183 (v1.21) July 1, 2014
Product Specification
www.xilinx.com
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XQ7VX330T 電子部品, 半導体
Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics
Table 6: Typical Quiescent Supply Current (Cont’d)
Symbol
Description
Device
ICCOQ
ICCAUXQ
Quiescent VCCO supply current
Quiescent VCCAUX supply current
XC7V585T
XC7V2000T
XC7VX330T
XC7VX415T
XC7VX485T
XC7VX550T
XC7VX690T
XC7VX980T
XC7VX1140T
XQ7V585T
XQ7VX330T
XQ7VX485T
XQ7VX690T
XQ7VX980T
XC7V585T
XC7V2000T
XC7VX330T
XC7VX415T
XC7VX485T
XC7VX550T
XC7VX690T
XC7VX980T
XC7VX1140T
XQ7V585T
XQ7VX330T
XQ7VX485T
XQ7VX690T
XQ7VX980T
Speed Grade
-3 -2G -2 -2L
-1
1111 1
N/A 1
11
1
1111 1
1111 1
1111 1
1111 1
1111 1
N/A 1 1 1
1
N/A 1
11
1
N/A N/A
1
1
1
N/A N/A
1
1
1
N/A N/A
1
1
1
N/A N/A
1 N/A
1
N/A N/A N/A
1
1
114 114 114 114 114
N/A 315 315 315 315
73 73 73 73 73
88 88 88 88 88
104 104 104 104 104
147 147 147 147 147
147 147 147 147 147
N/A 183 183 183 183
N/A 250 250 250 250
N/A N/A 114 114 114
N/A N/A
73
73
73
N/A N/A 104 104 104
N/A N/A 147 N/A 147
N/A N/A N/A 183 183
Units
-1M
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
1 mA
1 mA
1 mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
N/A mA
114 mA
73 mA
104 mA
N/A mA
N/A mA
DS183 (v1.21) July 1, 2014
Product Specification
www.xilinx.com
Send Feedback
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部品番号部品説明メーカ
XQ7VX330T

Virtex-7 T and XT FPGAs

Xilinx
Xilinx


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