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Datasheet XC7VX690T Equivalent ( PDF ) |
N.º | Número de pieza | Descripción | Fabricantes | Category |
1 | XC7VX690T | Virtex-7 T and XT FPGAs DS183 (v1.21) July 1, 2014
Virtex-7 T and XT FPGAs Data Sheet: DC and AC Switching Characteristics
Product Specification
Introduction
Virtex®-7 T and XT FPGAs are available in -3, -2, -1, and -2L speed grades, with -3 having the highest performance. The -2L devices operate at VCCINT = 1.0V and ar | Xilinx | data |
XC7 Datasheet ( Hoja de datos ) - resultados coincidentes |
N.º | Número de pieza | Descripción | Fabricantes | Catagory |
1 | XC7300FM | XC7300 CMOS EPLD Family ®
XC7300 CMOS EPLD Family
Product Description
Features
• High-performance Erasable Programmable Logic Devices (EPLDs) – 5 / 7.5 ns pin-to-pin speeds on all fast inputs – Up to 167 MHz maximum clock frequency • Advanced Dual-Block architecture – Fast Function Blocks – High-Density Func Xilinx cmos | | |
2 | XC73108 | XC7300 CMOS EPLD Family ®
XC7300 CMOS EPLD Family
Product Description
Features
• High-performance Erasable Programmable Logic Devices (EPLDs) – 5 / 7.5 ns pin-to-pin speeds on all fast inputs – Up to 167 MHz maximum clock frequency • Advanced Dual-Block architecture – Fast Function Blocks – High-Density Func Xilinx cmos | | |
3 | XC73144 | XC7300 CMOS EPLD Family ®
XC7300 CMOS EPLD Family
Product Description
Features
• High-performance Erasable Programmable Logic Devices (EPLDs) – 5 / 7.5 ns pin-to-pin speeds on all fast inputs – Up to 167 MHz maximum clock frequency • Advanced Dual-Block architecture – Fast Function Blocks – High-Density Func Xilinx cmos | | |
4 | XC73144 | 144-Macrocell CMOS EPLD ®
XC7300 CMOS EPLD Family
Product Description
Features
• High-performance Erasable Programmable Logic Devices (EPLDs) – 5 / 7.5 ns pin-to-pin speeds on all fast inputs – Up to 167 MHz maximum clock frequency • Advanced Dual-Block architecture – Fast Function Blocks – High-Density Func Xilinx cmos | | |
5 | XC73144-10 | 144-Macrocell CMOS EPLD ®
XC73144 144-Macrocell CMOS EPLD
Product Specifications
Features
• High-Performance EPLD – 7.5 ns pin-to-pin speed on all fast inputs – 100 MHz maximum clock frequency • Advanced Dual-Block architecture – Four Fast Function Blocks – Twelve High-Density Function Blocks • 100% inter Xilinx cmos | | |
6 | XC73144-12 | 144-Macrocell CMOS EPLD ®
XC73144 144-Macrocell CMOS EPLD
Product Specifications
Features
• High-Performance EPLD – 7.5 ns pin-to-pin speed on all fast inputs – 100 MHz maximum clock frequency • Advanced Dual-Block architecture – Four Fast Function Blocks – Twelve High-Density Function Blocks • 100% inter Xilinx cmos | | |
7 | XC73144-15 | 144-Macrocell CMOS EPLD ®
XC73144 144-Macrocell CMOS EPLD
Product Specifications
Features
• High-Performance EPLD – 7.5 ns pin-to-pin speed on all fast inputs – 100 MHz maximum clock frequency • Advanced Dual-Block architecture – Four Fast Function Blocks – Twelve High-Density Function Blocks • 100% inter Xilinx cmos | |
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