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VMMK-3313 の電気的特性と機能

VMMK-3313のメーカーはAVAGOです、この部品の機能は「15 - 33 GHz Directional Detector」です。


製品の詳細 ( Datasheet PDF )

部品番号 VMMK-3313
部品説明 15 - 33 GHz Directional Detector
メーカ AVAGO
ロゴ AVAGO ロゴ 




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VMMK-3313 Datasheet, VMMK-3313 PDF,ピン配置, 機能
VMMK-3313
15 - 33 GHz Directional Detector in SMT Package
Data Sheet
Description
The VMMK-3313 is a small and easy-to-use, broadband,
directional detector operating in various frequency bands
from 15 to 33 GHz with typical insertion loss of 0.5 dB. It is
housed in the Avago Technologies’ industry-leading and
revolutionary sub-miniature chip scale package (GaAsCap
wafer scale leadless package) which is small and ultra thin
yet can be handled and placed with standard 0402 pick
and place assembly equipment. The VMMK-3313 provides
a wide detecting power level from -5 to +30 dBm with
excellent input and output return losses. A typical of 15 dB
directivity is provided, and the detector requires only 1.5 V
DC biasing with small current drawn of 0.17 mA.
WLP0402, 1 mm x 0.5 mm x 0.25 mm
TY
Pin Connections (Top View)
Features
1 x 0.5 mm surface mount package
Ultrathin (0.25 mm)
Wide frequency range: 15 to 33 GHz
Wide dynamic range
Low Insertion loss
Directivity: 11-18 dB typ.
In and output match: 50 ohm
Specifications (24 GHz, Vb = 1.5 V, Zin = Zout = 50 )
Bias Current: 0.17 mA typical
Insertion Loss: 0.5 dB
Detector output offset voltage: 62 mV typical
Detector Output voltage at +20 dBm: 1070 mV typical
Applications
Point-to-Point Radio
Monitoring Power Amplifier Output Power
Power Control Loop Detector
Input/
Vbias
TY
Output/
Vdet
Input/
Vbias
Detector
Output/
Vdet
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 70 V
ESD Human Body Model = 350 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
Note:
“T” = Device Code
“Y” = Month Code

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VMMK-3313 pdf, ピン配列
Product Consistency Distribution Charts at 24 GHz, Vbias = 1.5 V
LSL USL LSL
USL
0.11 0.13 0.15 0.17 0.19 0.21 0.23 0.25
Ibias: Mean = 0.17 mA, LSL = 0.11 mA, USL = 0.25 mA
50 60
Voffset: Mean = 61 mV, LSL = 45 mV, USL = 75 mV
70
LSL USL
900 1000 1100 1200
Vdet_On @ Pin = +20 dBm: Mean = 1.07 V, LSL = 0.9 V, USL = 1.22 V
Notes:
Distribution data sample sized is based on at least 36 Kpcs taken from
MPV lots.
Future wafers allocated to this product may have nominal values
anywhere between the upper and lower limits.
3


3Pages


VMMK-3313 電子部品, 半導体
VMMK-3313 Biasing Information
Biasing and Operation
The VMMK-3313 is a 3 terminal device consisting of a
“through”50 ohm line connecting directly between the RF
Input and RF Output ports and a directional coupler with a
full wave detector that provides a DC output proportional
to RF power input. As with any high frequency device,
good grounding is required on the common port under
the device for it to produce low loss in the“through”mode.
A suggested PCB layout with appropriate grounding will
be cover later in this application section.
With only 3 terminals available, the DC bias and detected
voltage are internally DC coupled to the input and output
terminals respectively. The key to successful operation
of the VMMK-3313 is the use of low loss bias decoupling
networks connected to both the RF Input and the RF
Output ports. Figure 7 shows a simple biasing circuit.
The bias decoupling networks provide a low loss AC
coupled RF path to the device, a means of biasing the
device on the input, and a means of extracting the detected
voltage on the output of the device. The detector needs
2 DC blocking caps, C1 and C2, on the input and output
ports. This can be accomplished by printing coupled lines
on the PCB or using SMT capacitors (ATC 600 series) with
C1
RFin
R1
Vb
C3
detector
bias
C2
RFout
R2
Vdet
C4 R3
values chosen for the frequency of operation. All SMT
components are recommended to be no larger than 0402
size. Nominal bias voltage of 1.5 V or 0.14 mA is required
for proper operation. Biasing on the input is by a way of a
large value resistor R1. Its value can be computed using
the following equation:
R1 = (Vb -1.5)/0.00014
where Vb is the supply voltage.
Detected DC voltage is extracted on the output by a way
of a large value resistor R2, in the range of 10 k. Bypassing
capacitors C3 and C4 are needed to prevent RF influence
on the dc lines. Suggested value for bypass capacitors is
1 pF.
At zero RF input power, and at 1.5 V supply bias, a nominal
63 mV offset voltage appears at the detected output port.
The internal output source resistance for the detector is
approximately 20 k. Resistor R3 can be used as an
external load resistor for the detector. Its value can be
optimized for the desired Vout vs. RF input curve.
Figure 8 shows a VMMK-3313 characterization PCB used
to obtain the Vdet vs. Input Power characterization data
from 15 to 33 GHz. For ease in broadband characteriza-
tion, two external 45 MHz – 50 GHz Bias Networks (HP
11612B) were used.
Component
C1, C2
R1
R2
C3, C4
R3
Description
0.2 pF to 0.4 pF
(ATC 600 or printed coupled lines)
(Vb -1.5) / 0.00014
10 k
1 pF
External load resistor (optional)
Figure 7. Biasing the VMMK-3313 Detector Module
Figure 8. VMMK-3313 Characterization Board
6

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部品番号部品説明メーカ
VMMK-3313

15 - 33 GHz Directional Detector

AVAGO
AVAGO


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