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HCF4043B PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 HCF4043B
部品説明 QUAD 3-STATE R-S LATCHES
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 



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HCF4043B Datasheet, HCF4043B PDF,ピン配置, 機能
HCC/HCF4043B
HCC/HCF4044B
QUAD 3-STATE R-S LATCHES
QUAD NOR R-S LATCH-4043B
QUAD NAND R-S LATCH-4044B
. QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
. 3-LEVEL OUTPUTS WITH COMMON OUTPUT
ENABLE
. SEPARATE SET AND RESET INPUT FOR
EACH LATCH
. 5V, 10V, AND 15V PARAMETRIC RATINGS
. NOR AND NAND CONFIGURATIONS
. INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
. 100% TESTED FOR QUIESCENT CURRENT
. MEETS ALL REQUIREMENTS OF JEDECTEN-
TATIVE STANDARD N° 13A, ”STANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC40XXBF
HCF40XXBM1
HCF40XXBEY HCF40XXBC1
PIN CONNECTIONS
DESCRIPTION
The HCC4043B, HCC4044B, (extended tempera-
ture range) and the HCF4043B, HCF4044B (inter-
mediate temperature range) are monolithic
integrated circuits, available in 16-lead dual in-line
plastic or ceramic package and plastic micropack-
age. The HCC/HCF4043B types are quad cross-
coupled 3-state COS/MOS NOR latches and the
HCC/HCF4044B types are quad cross-coupled 3-
state COS/MOS NAND latches. Each latch has a
separate Q output and individual SET and RESET
inputs. The Q outputs are controlled by a common
ENABLE input. A logic ”1” or ”high” on the ENABLE
input connects the latch states to the Q outputs. A
logic ”0” or ”low” on the ENABLE input disconnects
the latch states from the Q outputs, resulting in an
open circuit condition on the Q outputs. The open
circuit feature allows common bussing of the out-
puts.
June 1989
4043B
4044B
1/13

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QUAD 3-STATE R-S LATCHES

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