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PDF HCF40192B Data sheet ( Hoja de datos )
| Número de pieza | HCF40192B | |
| Descripción | PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B BCD TYPE 40193B BINARY TYPE | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HCF40192B (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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HCC/HCF40192B
HCC/HCF40193B
PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK
WITH RESET) 40192B – BCD TYPE 40193B – BINARY TYPE
. INDIVIDUAL CLOCK LINES FOR COUNTING
UP OR COUNTING DOWN
. SYNCHRONOUS HIGH-SPEED CARRY AND
BORROW PROPAGATION DELAYS FOR CAS-
CADING
. ASYNCHRONOUS RESET AND PRESET CA-
PABILITY
. MEDIUM-SPEED OPERATION - fCL = 8MHz
(typ.) @ 10V
. STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
. 5V, 10V, AND 15V PARAMETRIC RATINGS
. INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
. 100% TESTED FOR QUIESCENT CURRENT
. MEETS ALL REQUIREMENTS OF JEDECTEN-
TATIVE STANDARD N° 13A, ”STANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY F
(Plastic Package) (Ceramic Frit Seal Package)
M1
(Chip Carrier)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC401XXBF
HCF401XXBM1
HCF401XXBEY HCF401XXBC1
DESCRIPTION
The HCC40192B, HCC40193B, (extended tem-
perature range) and the HCF40192B, HCF40193B
(intermediate temperature range) are monolithic in-
tegrated circuits, available in 16-lead dual in-line
plastic or ceramic package and platic micro pack-
age. The HCC/HCF40192B Presettable BCD
Up/Down Counter and the HCC/HCF40193B Pres-
ettable Binary Up/Down Counter each consist of 4
synchronously clocked, gated ”D” type flip-flops
connected as a counter. The inputs consist of 4 in-
dividual jam lines, a PRESET ENABLE control, in-
dividual CLOCK UP and CLOCK DOWN signals
and a master RESET. Four buffered Q signal out-
puts as well as CARRY and BORROW outputs for
multiple-stage counting schemes are provided. The
counter is cleared so that all outputs are in a low
state by a high on the RESET line. A RESET is ac-
complished asynchronously with the clock. Each
output is individually programmable asynchron-
ously with the clock to the level on the corresponding
jam input when thePRESET ENABLE control is low.
The counter counts up one count on the positive
clock edge of the CLOCK UP signal provided the
CLOCK DOWN line is high. The counter counts
down one count on the positive clock edge of the
CLOCK DOWN signal provided the CLOCK UP line
June 1989
PIN CONNECTIONS
1/15
1 page  
Internal Logic of Flip-flop.
HCC/HCF40192B/193B
TRUTH TABLE
Clock
Up
–/–
–\–
1
1
X
X
1 = High Level
Clock
Down
1
1
–/–
–\–
X
X
0 = Low Level X = Don’t Care.
Preset
Enable
1
1
1
1
0
X
Reset
0
0
0
0
0
1
Action
Count Up
No Count
Count Down
No Count
Preset
Reset
5/15
5 Page 
DIM.
a1
B
b
b1
D
E
e
e3
F
I
L
Z
HCC/HCF40192B/193B
Plastic DIP16 (0.25) MECHANICAL DATA
MIN.
0.51
0.77
mm
TYP.
0.5
0.25
8.5
2.54
17.78
3.3
MAX.
1.65
20
7.1
5.1
1.27
MIN.
0.020
0.030
inch
TYP.
0.020
0.010
0.335
0.100
0.700
0.130
MAX.
0.065
0.787
0.280
0.201
0.050
P001C
11/15
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet HCF40192B.PDF ] | |
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