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PDF SG6521DZ Data sheet ( Hoja de datos )
| Número de pieza | SG6521DZ | |
| Descripción | PC Power Supply Supervisors | |
| Fabricantes | Fairchild Semiconductor | |
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September 2008
SG6521 — PC Power Supply Supervisors
Features
Two 12V Sense Input Pins: VS12 and VS12B
Over-Voltage Protection (OVP) for 3.3V, 5V, and
two 12V
Over-Current Protection (OCP) for 3.3V, 5V, and
two 12V
Under-Voltage Protection (UVP) for 3.3V, 5V, and
two 12V
Open-Drain Output for PGO and FPO Pins
300ms Power-Good Delay
2.8ms PSON Control to FPO Turn-off Delay
48ms PSON Control Delay
No Lock-up During the Fast AC Power On/Off
Wide Supply Voltage Range: 4V to 15V
Over-Temperature Protection (OTP)
Additional Protection Input (Pext)
Applications
Switch-Mode Power Supplies with Active PFC
Servo System Power Supplies
PC-ATX Power Supplies
Description
The SG6521 is designed to provide the supply voltage,
current supervisor, remote on/off (PSON), power good
(PGO) indicator, and fault protection (FPO) functions for
switching power systems.
For supervisory functions, it provides the over-voltage
protection (OVP) for 3.3V, 5V, and two 12V; over-
current protection (OCP) for 3.3V, 5V, and two 12V;
under-voltage protection (UVP) for 3.3V, 5V, and two
12V. When 3.3V, 5V, or 12V voltage decreases to 2.3V,
3.5V, and 9V, respectively, the under-voltage protection
function is enabled. FPO is set HIGH to turn off the
PWM controller IC. The voltage difference across
external current shunt is used for OCP functions. An
external resistor can be used to adjust protection
threshold. An additional protection input pin provides
the flexibility for designing protection circuits.
The power supply is turned on after a 48ms delay when
PSON signal is set from HIGH to LOW. To turn off the
power supply, the PSON signal is set from LOW to
HIGH with a delay of 48ms. The PGI circuitry provides a
power-down warning signal for PGO. When PGI input is
lower than the internal 1.25V reference voltage, PGO
signal is pulled LOW.
Ordering Information
Part
Number
SG6521DZ
SG6521SZ
Operating Temperature
Range
-40°C to +85°C
-40°C to +85°C
Eco
Status
RoHS
RoHS
Package
16-pin Dual In-Line Package (DIP)
16-pin Small Outline Package (SOP)
Packing
Method
Rail
Tape & Reel
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
www.fairchildsemi.com
1 page  
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VDD DC Supply Voltage
VIN Input Voltage
PSON, PGI, VS5, IS5, VS33, IS33, Pext
VS12, VS12B, IS12, IS12B
VOUT
TJ
TSTG
TL
ESD
Output Voltage FPO, PGO
Operating Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering)
Electrostatic Discharge Capability
Human Body Model:
JESD22-A114
Machine Model:
JESD22-A115
Min.
-0.3
-0.3
-0.3
-40
-55
Max.
16
7.0
15.0
8.0
+125
+150
+260
3.0
200
Unit
V
V
V
V
°C
°C
°C
KV
V
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
TA Operating Ambient Temperature
Min.
-40
Typ.
Max.
+85
Unit
°C
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
5
www.fairchildsemi.com
5 Page 
Physical Dimensions (Continued)
10.00
9.80
8.89
A
16 9 B
1.75
6.00
4.00
3.80
5.6
PIN ONE
NDICATOR
1
1.27
(0.30)
8
0.51
0.35
0.25 M C B A
1.27 0.65
LAND PATTERN RECOMMENDATION
1.75 MAX
1.50
1.25
0.25
0.10
C
0.10 C
SEE DETAIL A
0.25
0.19
(R0.10)
(R0.10)
8°
0°
0.90
0.50
(1.04)
0.50
0.25
X 45°
GAGE PLANE
0.36
SEATING PLANE
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AC, ISSUE C.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
FLASH AND TIE BAR PROTRUSIONS
D) CONFORMS TO ASME Y14.5M-1994
E) LANDPATTERN STANDARD: SOIC127P600X175-16AM
F) DRAWING FILE NAME: M16AREV12.
DETAIL A
SCALE: 2:1
Figure 13. 16-Lead, Small Outline Integrated Circuit (SOIC)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet SG6521DZ.PDF ] | |
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