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NSBC143ZDXV6T1GのメーカーはON Semiconductorです、この部品の機能は「Dual NPN Bias Resistor Transistors」です。 |
部品番号 | NSBC143ZDXV6T1G |
| |
部品説明 | Dual NPN Bias Resistor Transistors | ||
メーカ | ON Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとNSBC143ZDXV6T1Gダウンロード(pdfファイル)リンクがあります。 Total 8 pages
MUN5233DW1,
NSBC143ZDXV6,
NSBC143ZDP6
Dual NPN Bias Resistor
Transistors
R1 = 4.7 kW, R2 = 47 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
• These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Rating
Symbol
Max
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current − Continuous IC 100 mAdc
Input Forward Voltage
VIN(fwd)
30
Vdc
Input Reverse Voltage
VIN(rev)
5
Vdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
Device
Package
Shipping†
MUN5233DW1T1G,
SMUN5233DW1T1G
SOT−363
3,000/Tape & Reel
NSBC143ZDXV6T1G
SOT−563
4,000/Tape & Reel
NSBC143ZDXV6T5G
SOT−563
8,000/Tape & Reel
NSBC143ZDP6T5G
SOT−963
8,000/Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
May, 2013 − Rev. 1
1
http://onsemi.com
PIN CONNECTIONS
(3) (2) (1)
R1
Q1
R2 R1
(4) (5)
R2
Q2
(6)
MARKING DIAGRAMS
SOT−363
CASE 419B
6
7K M G
G
1
SOT−563
CASE 463A
7K M G
G
1
SOT−963
CASE 527AD
YMG
1G
7K/Y
M
G
= Specific Device Code
= Date Code*
= Pb-Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
Publication Order Number:
DTC143ZD/D
1 Page MUN5233DW1, NSBC143ZDXV6, NSBC143ZDP6
ELECTRICAL CHARACTERISTICS (TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Characteristic
Symbol
Min
Typ
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
−
−
Collector-Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
−
−
Emitter-Base Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
−
−
Collector-Base Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO
50
−
Collector-Emitter Breakdown Voltage (Note 6)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
50
−
ON CHARACTERISTICS
DC Current Gain (Note 6)
(IC = 5.0 mA, VCE = 10 V)
hFE
80 200
Collector-Emitter Saturation Voltage (Note 6)
(IC = 10 mA, IB = 1.0 mA)
VCE(sat)
−
−
Input Voltage (Off)
(VCE = 5.0 V, IC = 100 mA)
Vi(off)
−
0.6
Input Voltage (On)
(VCE = 0.2 V, IC = 5.0 mA)
Vi(on)
−
0.9
Output Voltage (On)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL −
−
Output Voltage (Off)
(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kW)
VOH
4.9
−
Input Resistor
R1 3.3 4.7
Resistor Ratio
6. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle ≤ 2%.
R1/R2
0.08
0.1
Max
100
500
0.18
−
−
−
0.25
−
−
0.2
−
6.1
0.12
Unit
nAdc
nAdc
mAdc
Vdc
Vdc
V
Vdc
Vdc
Vdc
Vdc
kW
400
350
300
250
200
(1) (2) (3)
150
(1) SOT−363; 1.0 × 1.0 Inch Pad
(2) SOT−563; Minimum Pad
(3) SOT−963; 100 mm2, 1 oz. Copper Trace
100
50
0
−50 −25
0 25 50 75 100 125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
http://onsemi.com
3
3Pages MUN5233DW1, NSBC143ZDXV6, NSBC143ZDP6
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE W
D
e
654
HE −E−
123
b 6 PL
0.2 (0.008) M E M
A3
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419B−01 OBSOLETE, NEW STANDARD 419B−02.
MILLIMETERS
INCHES
DIM MIN NOM MAX MIN NOM MAX
A 0.80 0.95 1.10 0.031 0.037 0.043
A1 0.00 0.05 0.10 0.000 0.002 0.004
A3 0.20 REF
0.008 REF
b 0.10 0.21 0.30 0.004 0.008 0.012
C 0.10 0.14 0.25 0.004 0.005 0.010
D 1.80 2.00 2.20 0.070 0.078 0.086
E 1.15 1.25 1.35 0.045 0.049 0.053
e 0.65 BSC
0.026 BSC
L 0.10 0.20 0.30 0.004 0.008 0.012
HE 2.00 2.10 2.20 0.078 0.082 0.086
C
A1 L
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.40
0.0157
0.65
0.025
1.9
0.0748
ǒ ǓSCALE 20:1
mm
inches
SC−88/SC70−6/SOT−363
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
6 Page | |||
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部品番号 | 部品説明 | メーカ |
NSBC143ZDXV6T1G | Dual NPN Bias Resistor Transistors | ON Semiconductor |