DataSheet.jp

HCC4018 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 HCC4018
部品説明 PRESETTABLE DIVIDE-BY-N COUNTER
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 



Total 12 pages
		

No Preview Available !

HCC4018 Datasheet, HCC4018 PDF,ピン配置, 機能
HCC/HCF4018B
PRESETTABLE DIVIDE-BY-N COUNTER
. MEDIUM SPEED OPERATION - 10MHz (typ.)
AT VDD – VSS = 10V
. FULLY STATIC OPERATION
. QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
. STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
. INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
. 100% TESTED FOR QUIESCENT CURRENT
. 5V, 10V, AND 15V PARAMETRIC RATINGS
. MEETS ALL REQUIREMENTS OF JEDECTEN-
TATIVE STANDARD No 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC4018BF HCF4018BM1
HCF4018BEY HCF4018BC1
DESCRIPTION
The HCC4018B (extended temperature range) and
HCF4018B (intermediate temperature range) are
monolithic integrated circuit, available in 16-lead
dual in-line plastic or ceramic package and plastic
micropackage.
The HCC/HCF4018B types consist of 5 Johnson-
Counter stages, buffered Q outputs from each
stage, and counter preset control gating. CLOCK,
RESET, DATA, PRESET ENABLE, and 5 individual
JAM inputs are provided. Divide by 10, 8, 6, 4, or 2
counter configurations can be implemented by feed-
ing the Q5, Q4, Q3, Q2, Q1 signals, respectively,
back to the DATA input.
Divide-by-9, 7, 5, or 3 counter configurations can be
implemented by the use of a HCC/HCF4011B gate
package to properly gate the feedback connection
to the DATA input. Divide-by-functions greater than
10 can be achieved by use of multiple HCC/HCF
4018B units. The counter is advanced one count at
the positive clock-signal transition. Schmitt Trigger
action on the clock line permits unlimited clock rise
and fall times. A high RESET signal clears the
counter to an all-zero condition. A high PRESENT-
ENABLE signal allows information on the JAM in-
puts to preset the counter. Anti-lock gating is
provided to assure the proper counting sequence.
June 1989
PIN CONNECTIONS
1/12

1 Page





ページ 合計 : 12 ページ
PDF
ダウンロード
[ HCC4018.PDF ]

共有リンク

Link :

おすすめデータシート

部品番号部品説明メーカ
HCC40100B

32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER

STMicroelectronics
STMicroelectronics
HCC40100BF

32-STAGE STATIC LEFT/RIGHT SHIFT REGISTER

STMicroelectronics
STMicroelectronics
HCC40101B

9-BIT PARITY GENERATOR/CHECKER

STMicroelectronics
STMicroelectronics
HCC40101BF

9-BIT PARITY GENERATOR/CHECKER

STMicroelectronics
STMicroelectronics

www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap