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PDF LV0221CS Data sheet ( Hoja de datos )

Número de pieza LV0221CS
Descripción Front Monitor OE-IC
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No Preview Available ! LV0221CS Hoja de datos, Descripción, Manual

Ordering number : ENA1823
LV0221CS
CMOS IC
Front Monitor OE-IC
for Optical Pickups
http://onsemi.com
Overview
The LV0221CS is a front monitor optoelectronic IC for optical pickups that has a built-in photo diode compatible with
three waveforms. LV0221CS is small size and type CSP packages.
Functions
PIN photodiode compatible with three wavelengths incorporated.
Gain adjustment (-6dB to +6dB in 256 steps) through serial communication.
Amplifier to amplify differential output.
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Allowable power dissipation
Symbol
VCC
Pd1
Pd2
Operating temperature
Storage temperature
Topr
Tstg
Conditions
Glass epoxy one-side substrate 55mm × 45mm × 0.8mm
Copper foil area (about 80%), Ta=75˚C
Glass epoxy one-side substrate 55mm × 45mm × 0.8mm
Copper foil area (head: about 85% Tail: about 90%), Ta=75˚C
Ratings
6
136
100
-20 to +85
-40 to +100
Unit
V
mW
mW
˚C
˚C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Recommended Operating Conditions at Ta = 25°C
Parameter
Operating supply voltage
Output load capacitance
Output load resistance
Symbol
VCC
CO
ZO
Conditions
min
4.5
12
3
Ratings
typ
5
20
max
5.5
33
Unit
V
pF
kΩ
Semiconductor Components Industries, LLC, 2013
June, 2013
82510 SY 20100803-S00005 No.A1823-1/6

1 page




LV0221CS pdf
Serial protocol
LV0221CS
WRITE timing chart
(HOST) SEN
(HOST) SCLK
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
(HOST) SDIO
MSB
LSB MSB
LSB
A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Mode
Address
Data
(Output Data from Host)
READ timing chart
(HOST) SEN
(HOST) SCLK
(HOST) SDIO
SDIO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
MSB
LSB
A7 A6 A5 A4 A3 A2 A1 A0
Mode
Address
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
Data
(Output Data from Host)
SDIO pin load / CL=20pF (The table below shows the design reference value.)
Parameter
Symbol
Min.
SCL clock frequency Write
SCL clock frequency Read
SDIO data setup time
SDIO data hold time
SDIO output delay
SEN “H” period
SEN “L” period
SCL rise time after SEN rise
SEN fall time after final SCL rise
Serial input “H” voltage
Serial input “L” voltage
SDIO output “H” voltage
SDIO output “L” voltage
fSCL
fSCL
tDSU
tDHO
tDDLY
tENH
tENL
tSTA
tSTO
VIH
VIL
VOH
VOL
0
0
50
50
1.6
200
60
100
2.4
2.5
0
Typ.
10
2.9
0.3
Max.
10
4
80
0.6
3.3
0.8
Unit
MHz
MHz
ns
ns
ns
μs
ns
ns
ns
V
V
V
V
WRITE
(HOST) SEN
(HOST) SCLK
tSTA
(HOST) SDIO
READ
(HOST) SEN
(HOST) SCLK
(HOST) SDIO
SDIO
tENH
tDSU
tDHO
tDDLY
tENL
tSTO
No.A1823-5/6

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