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HC9P5504B-9 の電気的特性と機能

HC9P5504B-9のメーカーはIntersil Corporationです、この部品の機能は「EIA/ITU PABX SLIC with 40mA Loop Feed」です。


製品の詳細 ( Datasheet PDF )

部品番号 HC9P5504B-9
部品説明 EIA/ITU PABX SLIC with 40mA Loop Feed
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HC9P5504B-9 Datasheet, HC9P5504B-9 PDF,ピン配置, 機能
Data Sheet
HC-5504B
July 1998 File Number 2886.5
EIA/ITU PABX SLIC with 40mA Loop Feed
The Intersil SLIC incorporates many of the BORSHT functions
on a single IC chip. This includes DC battery feed, a ring relay
driver, supervisory and hybrid functions. This device is
designed to maintain transmission performance in the
presence of externally induced longitudinal currents. Using
the unique Intersil dielectric isolation process, the SLIC can
operate directly with a wide range of station battery voltages.
The SLIC also provides selective denial of power. If the PBX
system becomes overloaded during an emergency, the SLIC
will provide system protection by denying power to selected
subscriber loops.
The Intersil SLIC is ideally suited for the design of new digital
PBX systems by eliminating bulky hybrid transformers.
Ordering Information
PART
NUMBER
HC1-5504B-5
HC1-5504B-9
HC3-5504B-5
HC3-5504B-9
HC4P5504B-5
HC4P5504B-9
HC9P5504B-5
HC9P5504B-9
TEMP. RANGE
(oC)
PACKAGE
0 to 75
24 Ld CERDIP
-40 to 85 24 Ld CERDIP
0 to 75
24 Ld PDIP
-40 to 85 24 Ld PDIP
0 to 75
28 Ld PLCC
-40 to 85 28 Ld PLCC
0 to 75
24 Ld SOIC
-40 to 85 24 Ld SOIC
PKG. NO.
F24.6
F24.6
E24.6
E24.6
N28.45
N28.45
M24.3
M24.3
Pinouts
HC-5504B (PDIP, CERDIP, SOIC)
TOP VIEW
TIP 1
RING 2
RFS 3
VB+ 4
C3 5
DG 6
RS 7
RD 8
TF 9
RF 10
VB- 11
BG 12
24 TX
23 AG
22 C4
21 RX
20 +IN
19 -IN
18 OUT
17 C2
16 RC
15 PD
14 GKD
13 SHD
Features
• Pin for Pin Replacement for the HC-5504
• Capable of 5V or 12V (VB+) Operation
• Monolithic Integrated Device
• DI High Voltage Process
• Compatible With Worldwide PBX Performance
Requirements
• Controlled Supply of Battery Feed Current for Short Loops
(41mA)
• Internal Ring Relay Driver
• Allows Interfacing With Negative Superimposed Ringing
Systems
• Low Power Consumption During Standby
• Switch Hook Ground Key and Ring Trip Detection
Functions
• Selective Denial of Power to Subscriber Loops
Applications
• Solid State Line Interface Circuit for Analog and
Digital PBX Systems
• Direct Inward Dial (DID) Trunks
• Voice Messaging PBXs
• Related Literature
- AN549, The HC-5502S/4X Telephone Subscriber Line
Interface Circuits (SLIC)
- AN571, Using Ring Sync with HC-5502A and HC-5504
SLICs
HC-5504B (PLCC)
TOP VIEW
4 3 2 1 28 27 26
VB+ 5
C3 6
DG 7
N/C 8
RS 9
RD 10
TF 11
25 RX
24 +IN
23 -IN
22 N/C
21 OUT
20 C2
19 RC
12 13 14 15 16 17 18
51 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 Page





HC9P5504B-9 pdf, ピン配列
HC-5504B
Electrical Specifications
UTAnl=es2s5OoCth. eMrwini-sMeaSxpPeacirfiaemde, tVeBrs-
= -48V, VB+ = 12V and 5V, AG =
are Over Operating Temperature
BG = DG = 0V, Typical
Range (Continued)
Parameters
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Ground Key Detection Threshold
Loop Current During Power Denial
Dial Pulse Distortion
GKD = VOL
GKD = VOH
RL = 200
20 -
- mA
- - 10 mA
- ±2 - mA
0 - 5 ms
Receive Input Impedance
Transmit Output Impedance
2-Wire Return Loss
SRL LO
ERL
SRL HI
Longitudinal Balance
2-Wire Off Hook
(Note 3)
(Note 3)
Referenced to 600+ 2.16µF (Note 3)
1VRMS 200Hz - 3400Hz (Note 3) IEEE Method
0oC TA 75oC
- 110 -
- 10 20
- 15.5 -
- 24 -
- 31 -
58 65
-
k
dB
dB
dB
dB
2-Wire On Hook
60 63 - dB
4-Wire Off Hook
50 58 - dB
Low Frequency Longitudinal Balance
R.E.A. Method (Note 3), RL = 600
0oC TA 75oC
- - 23 dBrnC
- - -67 dBm0p
Insertion Loss
2-Wire to 4-Wire, 4 Wire to 2-Wire
Frequency Response
at 1kHz, 0dBm Input Level, Referenced 600
200Hz - 3400Hz Referenced to Absolute Loss at
1kHz and 0dBm Signal Level (Note 3)
- ±0.05 ±0.2 dB
-
±0.02 ±0.05
dB
Idle Channel Noise
2-Wire to 4-Wire, 4 Wire to 2-Wire
(Note 3)
- 1 5 dBrnC
- -89 -85 dBm0p
Absolute Delay
2-Wire to 4-Wire, 4 Wire to 2-Wire
Trans Hybrid Loss
(Note 3)
- - 2 ms
Balance Network Set Up for 600Termination at
36
40
-
dB
1kHz
Overload Level
2-Wire to 4-Wire, 4 Wire to 2-Wire
Level Linearity
2-Wire to 4-Wire, 4 Wire to 2-Wire
VB+ = +5V
VB+ = 12V
At 1kHz Referenced to 0dBm Level (Note 3)
+3 to -40dBm
-40 to -50dBm
-50 to -55dBm
1.5
1.75
-
-
-
- - VPEAK
- - VPEAK
-
±0.05
dB
- ±0.1 dB
- ±0.3 dB
Power Supply Rejection Ratio
VB+ to 2-Wire
VB+ to Transmit
VB- to 2-Wire
VB- to Transmit
(Note 3)
30 - 60Hz, RL = 600
15 -
15 -
15 -
15 -
- dB
- dB
- dB
- dB
53


3Pages


HC9P5504B-9 電子部品, 半導体
HC-5504B
Pin Descriptions (Continued)
28 PIN
PLCC
24 PIN
DIP/SOIC SYMBOL
DESCRIPTION
24 20 +IN The non-inverting analog input of the spare operational amplifier.
25 21 RX Receive Input, 4-Wire Side - A high impedance analog input which is internally biased. Capacitive coupling
to this input is required. AC signals appearing at this input differentially drive the Tip feed and Ring feed
terminals, which in turn drive tip and ring through 300of feed resistance on each side of the line.
26 22 C4 Capacitor #4 - An external capacitor to be connected between this terminal and analog ground. This ca-
pacitor prevents false ground key indication and false ring trip detection from occurring when longitudinal
currents are induced onto the subscriber loop from near by power lines and other noise sources. This ca-
pacitor is also required for the proper operation of ring trip detection. Typical value is 0.5µF, to 1.0µF, 20V.
This capacitor should be nonpolarized.
27 23 AG Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX)
(Note 5) and receive input (RX) terminals.
28 24 TX Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential voltage
across Tip and Ring. Transhybrid balancing must be performed (using the SLIC microcircuit’s spare op
amp) beyond this output to completely implement two to four wire conversion. This output is unbalanced
and referenced to analog ground. Since the DC level of this output varies with loop current, capacitive cou-
pling to the next stage is essential.
1, 8, 15, 22
NC No internal connection.
NOTE:
5. All grounds (AG, BG, and DG) must be applied before VB+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
Functional Diagram
RING SYNC
RING COMMAND
RS
RC
RD
TIP 1/2 RING
RELAY 150
TIP
150
2 WIRE
LOOP
SECONDARY
PROTECTION
TF
VB-
BG
VB- RF
1/2 RING
RELAY
RFS
150
RING
RING
VOLTAGE
VB-
150
RING
PD
POWER DENIAL
RING
CONTROL
RING
TRIP
LOOP
MONITORING
DIFF
AMP
-
+
SHD SWITCH HOOK
DETECTION
GKD GROUND KEY
DETECTION
TX TRANSMIT
OUTPUT
BATTERY
FEED
+1
LOOP
CURRENT
LIMITER
LINE
DRIVERS
-1
SLIC MICROCIRCUIT
+
-
OP
AMP
OUT
+IN
-IN
RX RECEIVE
INPUT
56

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部品番号部品説明メーカ
HC9P5504B-5

EIA/ITU PABX SLIC with 40mA Loop Feed

Intersil Corporation
Intersil Corporation
HC9P5504B-9

EIA/ITU PABX SLIC with 40mA Loop Feed

Intersil Corporation
Intersil Corporation


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