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PDF HC5523IP Data sheet ( Hoja de datos )
| Número de pieza | HC5523IP | |
| Descripción | LSSGR/TR57 CO/Loop Carrier SLIC with Low Power Standby | |
| Fabricantes | Intersil Corporation | |
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Data Sheet
HC5523
October 1998
File Number 4144.5
LSSGR/TR57 CO/Loop Carrier SLIC with
Low Power Standby
The HC5523 is a subscriber line interface circuit which is
interchangeable with Ericsson’s PBL3764A/4 for distributed
central office applications. Enhancements include immunity
to circuit latch-up during hot plug and absence of false
signaling in the presence of longitudinal currents.
The HC5523 is fabricated in a High Voltage Dielectrically
Isolated (DI) Bipolar Process that eliminates leakage
currents and device latch-up problems normally associated
with junction isolated ICs. The elimination of the leakage
currents results in improved circuit performance for wide
temperature extremes. The latch free benefit of the DI
process guarantees operation under adverse transient
conditions. This process feature makes the HC5523 ideally
suited for use in harsh outdoor environments.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HC5523IM
-40 to 85 28 Ld PLCC
HC5523IP
-40 to 85 22 Ld PDIP
PKG.
NO.
N28.45
E22.4
Block Diagram
Features
• DI Monolithic High Voltage Process
• Programmable Current Feed (20mA to 60mA)
• Programmable Loop Current Detector Threshold and
Battery Feed Characteristics
• Ground Key and Ring Trip Detection
• Compatible with Ericsson’s PBL3764A/4
• Thermal Shutdown
• On-Hook Transmission
• Wide Battery Voltage Range (-24V to -58V)
• Low Standby Power
• Meets TR-NWT-000057 Transmission Requirements
• -40oC to 85oC Ambient Temperature Range
Applications
• Digital Loop Carrier Systems • Pair Gain
• Fiber-In-The-Loop ONUs
• POTS
• Wireless Local Loop
• PABX
• Hybrid Fiber Coax
• Related Literature
- AN9632, Operation of the HC5523/15 Evaluation Board
RINGRLY
DT
DR
TIP
RING
HPT
HPR
RING RELAY
DRIVER
RING TRIP
DETECTOR
2-WIRE
INTERFACE
VBAT
VCC
VEE
AGND
BGND
BIAS
LOOP CURRENT
DETECTOR
GROUND KEY
DETECTOR
4-WIRE
INTERFACE
VF SIGNAL
PATH
DIGITAL
MULTIPLEXER
VTX
RSN
E0
E1
C1
C2
DET
RD
RDC
RSG
56 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page  
HC5523
Electrical Specifications
PARAMETER
4-Wire to 2-Wire
TA = -40oC to 85oC, VCC = +5V ±5%, VEE = -5V ±5%, VBAT = -48V, AGND = BGND = 0V, RDC1 = RDC2 = 41.2kΩ,
RD = 39kΩ, RSG = 0Ω, RF1 = RF2 = 0Ω, CHP = 10nF, CDC = 1.5µF, ZL = 600Ω, Unless Otherwise Specified. All pin
number references in the figures refer to the 28 lead PLCC package. (Continued)
CONDITIONS
MIN
TYP
MAX
UNITS
-55dBm to -40dBm (Note 22, Figure 9)
-0.2 - 0.2 dB
GRX = ((VTR1- VTR2)(300k))/(-3)(600)
Where: VTR1 is the Tip to Ring Voltage with VRSN = 0V
and VTR2 is the Tip to Ring Voltage with VRSN = -3V VRSN = 0V
TIP RSN
27 16
RRX
300kΩ
VRSN = -3V
RL
600Ω
VTR
RDC1
41.2kΩ
RING RDC
28 14
RDC2
41.2kΩ
CDC
1.5µF
C
RL
600Ω
EG
1/ωC < RL
IDCMET
TIP VTX
27 19
VTR
RING RSN
28 16
RT
600kΩ
VTX
RRX
ERX
300kΩ
FIGURE 8. CURRENT GAIN-RSN TO METALLIC
NOISE
FIGURE 9. FREQUENCY RESPONSE, INSERTION LOSS,
GAIN TRACKING AND HARMONIC DISTORTION
Idle Channel Noise at 2-Wire
C-Message Weighting (Note 23, Figure 10)
-
8.5
- dBrnC
Psophometrical Weighting
(Note 23, Figure 10)
- -81.5 - dBrnp
Idle Channel Noise at 4-Wire
C-Message Weighting (Note 24, Figure 10)
-
8.5
- dBrnC
Psophometrical Weighting
(Note 23, Figure 10)
- -81.5 - dBrnp
HARMONIC DISTORTION
2-Wire to 4-Wire
0dBm, 1kHz (Note 25, Figure 7)
- -65 -54 dB
4-Wire to 2-Wire
0dBm, 0.3kHz to 3.4kHz (Note 26, Figure 9)
-
-65 -54 dB
BATTERY FEED CHARACTERISTICS
Constant Loop Current Tolerance
RDCX = 41.2kΩ
Loop Current Tolerance (Standby)
Open Circuit Voltage (VTIP - VRING)
LOOP CURRENT DETECTOR
On-Hook to Off-Hook
Off-Hook to On-Hook
Loop Current Hysteresis
GROUND KEY DETECTOR
I-L40=o2C5t0o08/(5RoDCC(1N+otReD2C72)),
-IL40=o(CVBtoAT8-53o)C/(R(NLo+t1e82080)),
-40oC to 85oC, (Active) RSG = ∞
RD = 39kΩ, -40oC to 85oC
RD = 39kΩ, -40oC to 85oC
RD = 39kΩ, -40oC to 85oC
0.92IL
0.8IL
14
IL
IL
16.67
1.08IL
1.2IL
20
mA
mA
V
372/RD
325/RD
25/RD
465/RD
405/RD
60/RD
558/RD
485/RD
95/RD
mA
mA
mA
Tip/Ring Current Difference - Trigger
(Note 29, Figure 11)
8 12 17 mA
Tip/Ring Current Difference - Reset
(Note 29, Figure 11)
3 7 12 mA
Hysteresis
(Note 29, Figure 11)
0 5 9 mA
60
5 Page 
HC5523
+-
TIP
R1
RING
ORDERING INFORMATION
CASE 1
CASE 2
CASE 3
IMETALLIC
←
ILONGITUDINAL
←
ILONGITUDINAL
→
IMETALLIC
→
ILONGITUDINAL
←
ILONGITUDINAL
→
R2
-
+
HC5523
gm1(IMETALLIC)
CURRENT
LOOP
COMPARATOR
gm1
gm2(ITIP - IRING)
gm2
IGK
RH
+-
GROUND
KEY
COMPARATOR
D1
D2
I1
RH
+-
-
VREF
1.25V
RD
IRD RD
VEE
-5V
DIGITAL MULTIPLEXER
DET
CD
FIGURE 18. LOOP CURRENT AND GROUND KEY DETECTORS
Before proceeding with an explanation of the loop current
detector, ground key detector and later the longitudinal
impedance, it is important to understand the difference
between a “metallic” and “longitudinal” loop currents. Figure 18
illustrates 3 different types of loop current encountered.
Case 1 illustrates the metallic loop current. The definition of
a metallic loop current is when equal currents flow out of tip
and into ring. Loop current is a metallic current.
Cases 2 and 3 illustrate the longitudinal loop current. The
definition of a longitudinal loop current is a common mode
current, that flows either out of or into tip and ring
simultaneously. Longitudinal currents in the on-hook state result
in equal currents flowing through the sense resistors R1 and
R2 (Figure 18). And longitudinal currents in the off-hook state
result in unequal currents flowing through the sense resistors
R1 and R2. Notice that for case 2, longitudinal currents flowing
away from the SLIC, the current through R1 is the metallic loop
current plus the longitudinal current; whereas the current
through R2 is the metallic loop current minus the longitudinal
current. Longitudinal currents are generated when the phone
line is influenced by magnetic fields (e.g. power lines).
Loop Current Detector
Figure 18 shows a simplified schematic of the loop current
and ground key detectors. The loop current detector works
by sensing the metallic current flowing through resistors R1
and R2. This results in a current (IRD) out of the
transconductance amplifier (gm1) that is equal to the product
of gm1 and the metallic loop current. IRD then flows out the
RD pin and through resistor RD to VEE. The value of IRD is
equal to:
IRD = --I--T----I-P-----6–---0--I-0-R----I--N----G---- = 3---I-0-L--0--
(EQ. 24)
The IRD current results in a voltage drop across RD that is
compared to an internal 1.25V reference voltage. When the
voltage drop across RD exceeds 1.25V, and the logic is
configured for loop current detection, the DET pin goes low.
The hysteresis resistor RH adds an additional voltage
effectively across RD, causing the on-hook to off-hook
threshold to be slightly higher than the off-hook to on-hook
threshold.
Taking into account the hysteresis voltage, the typical value
of RD for the on-hook to off-hook condition is:
RD = I--O-----N-----–----H----O-----O----K----4--t-6-o---5--O-----F---F-----–----H----O----O-----K--
(EQ. 25)
Taking into account the hysteresis voltage, the typical value
of RD for the off-hook to on-hook condition is:
RD = I--O-----F----F----–----H----O-----O----K-3---7--t--5o-----O-----N-----–----H----O----O-----K--
(EQ. 26)
A filter capacitor (CD) in parallel with RD will improve the
accuracy of the trip point in a noisy environment. The value
of this capacitor is calculated using the following Equation:
CD = R---T--D--
(EQ. 27)
where: T = 0.5ms
Ground Key Detector
A simplified schematic of the ground key detector is shown
in Figure 18. Ground key, is the process in which the ring
terminal is shorted to ground for the purpose of signaling an
Operator or seizing a phone line (between the Central Office
and a Private Branch Exchange). The Ground Key detector
is activated when unequal current flow through resistors R1
66
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