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HC55171BIB の電気的特性と機能

HC55171BIBのメーカーはIntersil Corporationです、この部品の機能は「Low Cost 5 REN Ringing SLIC for ISDN Modem/TA and WL」です。


製品の詳細 ( Datasheet PDF )

部品番号 HC55171BIB
部品説明 Low Cost 5 REN Ringing SLIC for ISDN Modem/TA and WL
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HC55171BIB Datasheet, HC55171BIB PDF,ピン配置, 機能
Data Sheet
HC55171B
July 1998 File Number 4422.1
Low Cost 5 REN Ringing SLIC
for ISDN Modem/TA and WL
The HC55171B low cost, 5 REN ringing SLIC is designed to
accommodate a wide variety of short loop applications and
provides the same degree of flexibility as the high
performance HC55171. The flexible features include open
circuit tip to ring DC voltages, user defined ringing
waveforms, ring trip detection thresholds, and loop current
limits that can be tailored for many applications. Additional
features of the HC55171B are complex impedance
matching, pulse metering, and transhybrid balance. The
HC55171B is designed for use in short loop, low cost
systems where traditional ring generation is not
economically feasible.
The device is manufactured in a high voltage Dielectric
Isolation (DI) process. The DI process provides substrate
latch up immunity, resulting in a robust system design. A
thermal shutdown with an alarm output and line fault
protection are also included for operation in harsh
environments.
Ordering Information
PART
NUMBER
HC55171BIM
HC55171BIB
TEMP. RANGE
(oC) PACKAGE
-40 to 85 28 Ld PLCC
-40 to 85 28 Ld SOIC
PKG. NO.
N28.45
M28.3
Block Diagram
Features
• Load Drive Capability . . . . . . . . . . . . . . . . . . . . . . . 5 REN
• Trapezoidal, Square or Sine Wave Capability
• Ringing from -80V Battery . . . . . . . . . . . . . . . . . . . 75VP-P
• Ringing from -75V Battery . . . . . . . . . . . . . . . . . . . 70VP-P
• Ringing Current Independent of Loop Current Setting
• Ringing Crest Factor Independent of REN Loading
• Latchup Immune to Inductive Kick Back and Hot Plug
• Fax, Answering Machine and MTU Compatible
• Resistive and Complex Impedance Matching
• Programmable Loop Current Limit
• Switch Hook, Ring Trip and Ground Key Detection
• Single Low Voltage +5V Supply
Applications
• Solid State Line Interface Circuit for Hybrid Fiber Coax, Set
Top Box, Voice/Data Modems
• Related Literature
- AN9607, Impedance Matching Design Equations
- AN9628, AC Voltage Gain
- AN9636, Implementing an Analog Port for ISDN
- AN549, The HC-5502/4X Telephone SLIC
TIP FEED
TIP SENSE
RING FEED
RING SENSE 1
RING SENSE 2
VREF
RTI
VBAT
VCC
AGND
BGND
2-WIRE
INTERFACE
LOOP CURRENT
DETECTOR
FAULT
DETECTOR
BIAS
CURRENT
LIMIT
RING TRIP
DETECTOR
IIL LOGIC INTERFACE
F1 F0 RS TST
4-WIRE
INTERFACE
+-
RELAY
DRIVER
RDI
VRX
VTX
VRING
- IN 1
OUT 1
SHD
ALM
ILIMIT
RTD
RDO
63 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 Page





HC55171BIB pdf, ピン配列
HC55171B
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at TA = 25oC, Min-Max Parameters are over
Operating Temperature Range, VBAT = -24V, VCC = +5V, AGND = BGND = 0V. All AC Parameters are specified
at 6002-Wire terminating impedance. (Continued)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNITS
Level Linearity
+3 to 0dBm, Referenced to -10dBm (Note 3)
-
-
±0.10
dB
0 to -40dBm, Referenced to -10dBm (Note 3)
-
-
±0.12
dB
-40 to -55dBm, Referenced to -10dBm (Note 3)
-
-
±0.30
dB
Absolute Delay, 2-Wire to 4-Wire
300Hz to 3400Hz (Note 3)
- - 1.0 µs
Absolute Delay, 4-Wire to 2-Wire
300Hz to 3400Hz (Note 3)
- - 1.0 µs
Absolute Delay, 4-Wire to 4-Wire
300Hz to 3400Hz (Note 3)
- 0.95 -
µs
Transhybrid Loss
Total Harmonic Distortion
2-Wire/4-Wire, 4-Wire/2-Wire, 4-Wire/4-Wire
VIN = 1VP-P at 1kH (Note 3)
Reference Level 0dBm at 600
300Hz to 3400Hz (Note 3)
36 40 - dB
- - -50 dB
Idle Channel Noise
2-Wire and 4-Wire
C-Message (Note 3)
Psophometric (Note 3)
- 3 - dBrnC
- -87 - dBmp
PSRR, VCC to 2-Wire
PSRR, VCC to 4-Wire
PSRR, VBAT to 2-Wire
30Hz to 200Hz, RL = 600(Note 3)
30 35 - dB
45 47 - dB
23 28 - dB
PSRR, VBAT to 4-Wire
33 38 - dB
PSRR, VCC to 2-Wire
PSRR, VCC to 4-Wire
PSRR, VBAT to 2-Wire
200Hz to 3.4kHz, RL = 600(Note 3)
33 35 - dB
44 46 - dB
40 50 - dB
PSRR, VBAT to 4-Wire
50 60 - dB
PSRR, VCC to 2-Wire
PSRR, VCC to 4-Wire
PSRR, VBAT to 2-Wire
3.4kHz to 16kHz, RL = 600(Note 3)
30 34 - dB
35 40 - dB
30 40 - dB
PSRR, VBAT to 4-Wire
40 50 - dB
DC PARAMETERS
Loop Current Programming Range
(Note 4)
20 - 60 mA
Loop Current Programming Accuracy
-15 - +15 %
Loop Current During Power Denial
Fault Current, Tip to Ground
RL = 200Ω, VBAT = -48V
(Note 3)
- ±4 - mA
- 90 - mA
Fault Current, Ring to Ground
- 100 - mA
Fault Current, Tip and Ring to Ground
(Note 3)
- 130 - mA
Switch Hook Detection Threshold
9 12 15 mA
Ring Trip Comparator Voltage Threshold
Thermal ALARM Output
Safe Operating Die Temperature Exceeded
(Note 3)
-0.28
140
-0.24
-
-0.22
160
V
oC
Dial Pulse Distortion
(Note 3)
- 0.1 0.5 ms
65


3Pages


HC55171BIB 電子部品, 半導体
HC55171B
Circuit Operation and Design Information
SLIC DESIGN EQUATIONS
FUNCTION
2-Wire to 4-Wire Gain
4-Wire To 2-wire Gain
4-Wire To 4-wire Gain
Loop Current Limit Programming
EQUATION
DEFINITION OF TERMS
V----V-O---2-U---W-T----1- = –Z-2---02----0w-- ⋅ R-R----ZR----OF--
VOUT1 = SLIC 4-wire Output
V2w = Voltage across 2-wire load
Z2W = 2-Wire Impedance
V-V----2R---W-X--
=
2
Z----2----W----Z--+--2---ZW----S----L---I--C--
V2W = Voltage Across 2-Wire Load
VRX = SLIC 4-Wire Input
Z2W = 2-Wire Impedance
ZSLIC = SLIC Synthesized Impedance
V-----O----U----T----1-
VRX
=
2
-Z---2----W----Z--+--2---ZW----S----L---I--C--
Z--2--2-0---W0--- -RR----ZR----OF--
VOUT1 = SLIC 4-Wire Output
VRX = SLIC 4-Wire Input
Z2W = 2-Wire Impedance
ZSLIC = SLIC Synthesized Impedance
ILIMIT = (---0---.--6--(--)2--(--0-R--0--I--xL---R1-----+I--L---R2---)-I--L----2---)
ILIMIT = Programmed Loop Current Limit
RIL1 = Programming Resistor
RIL2 = Programming Resistor
Impedance Matching
RZO = K ⋅ (Z2W 100)
RRF = K 200 2
Z2W = 2-Wire Impedance
K = 100
Through SLIC Ringing
The HC55171B uses linear amplification to produce the
ringing signal. As a result the ringing SLIC can produce sinu-
soid, trapezoid or square wave ringing signals. Regardless of
the wave shape, the ringing signal is balanced. The balanced
waveform is another way of saying that the tip and ring DC
potentials are the same during ringing.
Trapezoidal Ringing
The trapezoidal ringing waveform provides a larger RMS
voltage to the handset. Larger RMS voltages to the handset
provide more power for ringing and also increase the loop
length supported by the ringing SLIC.
One set of component values will satisfy the entire ringing
loop range of the SLIC. A single resistor sets the open circuit
RMS ringing voltage, which will set the crest factor of the
ringing waveform. The crest factor of the HC55171B ringing
waveform is independent of the ringing load (REN) and the
loop length. Another robust feature of the HC55171B ringing
SLIC is the ring trip detector circuit. The suggested values for
the ring trip detector circuit cover quite a large range of
applications.
The assumptions used to design the trapezoidal ringing
application circuit are listed below:
• Loop current limit set to 25mA.
• Impedance matching is set to 600resistive.
• 2-wire surge protection is not required.
• System able to monitor RTD and SHD.
Logic ringing signal is used to drive RC trapezoid network.
Crest Factor Programming
As previously mentioned, a single resistor is required to set
the crest factor of the trapezoidal waveform. The only design
variable in determining the crest factor is the battery voltage.
The battery voltage limits the peak signal swing and
therefore directly determines the crest factor.
A set of tables will be provided to allow selection of the crest
factor setting resistor. The tables will include crest factors
below the Bellcore minimum of 1.2 since many ringing SLIC
applications are not constrained by Bellcore requirements.
TABLE 1. CREST FACTOR PROGRAMMING RESISTOR FOR
VBAT = -80V
RTRAP
CF
RMS RTRAP
CF
RMS
01.10 65.0 8251.25 57.6
389
1.15
62.6 9641.30
55.4
640
1.20
60.0 10951.35
53.3
The RMS voltage listed in the table is the open circuit RMS
voltage generated by the SLIC.
TABLE 2. CREST FACTOR PROGRAMMING RESISTOR FOR
VBAT = -75V
RTRAP
CF
RMS RTRAP
CF
RMS
01.10 60.9 10101.25 53.7
500
1.15
58.3 11901.30
51.6
791
1.20
55.9 13341.35
49.7
68

6 Page



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部品番号部品説明メーカ
HC55171BIB

Low Cost 5 REN Ringing SLIC for ISDN Modem/TA and WL

Intersil Corporation
Intersil Corporation
HC55171BIM

Low Cost 5 REN Ringing SLIC for ISDN Modem/TA and WL

Intersil Corporation
Intersil Corporation


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