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UPD42S65405-A50 の電気的特性と機能

UPD42S65405-A50のメーカーはNECです、この部品の機能は「64M-BIT DYNAMIC RAM」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD42S65405-A50
部品説明 64M-BIT DYNAMIC RAM
メーカ NEC
ロゴ NEC ロゴ 




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UPD42S65405-A50 Datasheet, UPD42S65405-A50 PDF,ピン配置, 機能
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD4264405, 42S65405, 4265405
64 M-BIT DYNAMIC RAM
16 M-WORD BY 4-BIT, EDO
Description
The µPD4264405, 42S65405, 4265405 are 16,777,216 words by 4 bits CMOS dynamic RAMs with optional EDO.
EDO is a kind of the page mode and is useful for the read operation.
Besides, the µPD42S65405 can execute CAS before RAS self refresh.
These are packaged in 32-pin plastic TSOP (II) and 32-pin plastic SOJ.
Features
• EDO (Hyper page mode)
• 16,777,216 words by 4 bits organization
• Single +3.3 V ± 0.3 V power supply
• Fast access and cycle time
Part number
µPD4264405-A50
µPD42S65405-A50, 4265405-A50
µPD4264405-A60
µPD42S65405-A60, 4265405-A60
Power consumption Access time
Active (MAX.)
(MAX.)
360 mW
468 mW
50 ns
324 mW
396 mW
60 ns
R/W cycle time
(MIN.)
84 ns
104 ns
EDO (Hyper page mode)
cycle time (MIN.)
20 ns
25 ns
• The µPD42S65405 can execute CAS before RAS self refresh.
Part number
µPD42S65405
Refrech cycle
4,096 cycles/128 ms
µPD4264405
µPD4265405
8,192 cycles/64 ms
4,096 cycles/64 ms
4,096 cycles/64 ms
Refresh
RAS only refresh, Normal read/write,
CAS before RAS self refresh,
CAS before RAS refresh, Hidden refresh
RAS only refresh, Normal read/write
CAS before RAS refresh, Hidden refresh
RAS only refresh, Normal read/write,
CAS before RAS refresh, Hidden refresh
Power consumption
at standby (MAX.)
0.72 mW
(CMOS level input)
1.8 mW
(CMOS level input)
The information in this document is subject to change without notice.
Document No. M10856EJ6V0DS00 (6th edition)
Date Published September 1997 N
Printed in Japan
The mark shows major revised points.
© 1995

1 Page





UPD42S65405-A50 pdf, ピン配列
Pin Configurations (Marking Side)
32-pin Plastic TSOP (II) (400 mil)
µPD4264405G5-7JD
µPD42S65405G5-7JD
µPD4265405G5-7JD
µPD4264405, 42S65405, 4265405
32-pin Plastic SOJ (400 mil)
µPD4264405LE
µPD42S65405LE
µPD4265405LE
VCC
I/O1
I/O2
NC
NC
NC
NC
WE
RAS
A0
A1
A2
A3
A4
A5
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 GND
31 I/O4
30 I/O3
29 NC
28 NC
27 NC
26 CAS
25 OE
24 A12/NCNote
23 A11
22 A10
21 A9
20 A8
19 A7
18 A6
17 GND
Note A12 ... µPD4264405
NC ... µPD42S65405, 4265405
A0 to A12 : Address Inputs
I/O1 to I/O4 : Data Inputs/Outputs
RAS
: Row Address Strobe
CAS
: Column Address Strobe
WE : Write Enable
OE : Output Enable
VCC : Power Supply
GND
: Ground
NC : No Connection
VCC
I/O1
I/O2
NC
NC
NC
NC
WE
RAS
A0
A1
A2
A3
A4
A5
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 GND
31 I/O4
30 I/O3
29 NC
28 NC
27 NC
26 CAS
25 OE
24 A12/NCNote
23 A11
22 A10
21 A9
20 A8
19 A7
18 A6
17 GND
3


3Pages


UPD42S65405-A50 電子部品, 半導体
µPD4264405, 42S65405, 4265405
Hyper Page Mode (EDO)
The hyper page mode (EDO) is a kind of page mode with enhanced features. The two major features of the
hyper page mode (EDO) are as follows.
1. Data output time is extended.
In the hyper page mode (EDO), the output data is held to the next CAS cycle’s falling edge, instead of the rising
edge. For this reason, valid data output time in the hyper page mode (EDO) is extended compared with the fast
page mode (= data extend function). In the fast page mode, the data output time becomes shorter as the CAS
cycle time becomes shorter. Therefore, in the hyper page mode (EDO), the timing margin in read cycle is larger
than that of the fast page mode even if the CAS cycle time becomes shorter.
2. The CAS cycle time in the hyper page mode (EDO) is shorter than that in the fast page mode.
In the hyper page mode (EDO), due to the data extend function, the CAS cycle time can be shorter than in the
fast page mode if the timing margin is the same.
Taking a device whose tRAC is 60 ns as an example, the CAS cycle time in the fast page mode is 25 ns while that
in the fast page mode is 40 ns.
In the hyper page mode (EDO) , read (data out) and write (data in) cycles can be executed repeatedly during one
RAS cycle. The hyper page mode (EDO) allows both read and write operations during one cycle.
The following shows a part of the hyper page mode (EDO) read cycle. Specifications to be observed are described
in the next page.
VIH
RAS VIL
Hyper Page Mode (EDO) Read Cycle
tHPC
tOFR
VIH
CAS VIL
tOFC
Address VIH
VIL
VIH
WE
VIL
VIH
OE VIL
I/O
VOH
VOL
Row
Col.A
tRAC
tAA
tCAC
tOCH
tOEA
Col.B
tAA
tCAC
Col.C
tAA
tCAC
tRRH
tRCH
tWPZ
tCHO
tOEP
tOCH
tOEP
tOEA
tCHO
tWEZ
Hi - Z
tOLZ
tCLZ
tDHC
tOEZ
tCLZ tOEZ
tOEZ
Data out A
Data out B
Data out C
Data out C Hi - Z
6

6 Page



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部品番号部品説明メーカ
UPD42S65405-A50

64M-BIT DYNAMIC RAM

NEC
NEC


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