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HC4052 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 HC4052
部品説明 ANALOGMULTIPLEXER/DEMULTIPLEXER: SINGLE8CHANNEL/ DUAL 4CHANNEL/ TRIPLE2CHANNEL
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 



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HC4052 Datasheet, HC4052 PDF,ピン配置, 機能
M54HC4051/52/53
M74HC4051/52/53
ANALOG MULTIPLEXER/DEMULTIPLEXER:
SINGLE 8 CHANNEL, DUAL 4 CHANNEL, TRIPLE 2 CHANNEL
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 oC
. LOGIC LEVEL TRANSLATION TO ENABLE 5V
. LOGIC SIGNAL TO COMMUNICATE WITH
±5V ANALOG SIGNAL
LOW ”ON” RESISTANCE:
70TYP. (VCC - VEE = 4.5 V)
50TYP. (VCC - VEE = 9 V)
. WIDE ANALOG INPUT VOLTAGE RANGE: ±6V
. FAST SWITCHING:
tpd = 15 ns (TYP.) AT TA = 25 oC
. LOW CROSSTALK BETWEEN SWITCHES
. HIGH ON/OFF OUTPUT VOLTAGE RATIO
. WIDE OPERATING VOLTAGE RANGE
(VCC - VEE) = 2V TO 12V
. LOW SINE WAVE DISTORTION
0.02% AT VCC - VEE = 9V
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. PIN AND FUNCTION COMPATIBLE WITH
HCC/HCF4051/4052/4053B
DESCRIPTION
These devices are analog multiplexer
demultiplexers in high speed silicon gate C2MOS
technology and they are pin compatible with the
equivalent metal gate CMOS ”4000B” series. These
analog switches are bidirectional and digitally
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCXXXXF1R M74HCXXXXM1R
M74HCXXXXB1R M74HCXXXXC1R
controlled.
A built-in level shifting is included to allow them an
input range of up to ± 6V (peak) for an analog signal
with digital control signal of 0 to 6V.
VEE supply pin is provided for analog input signals.
They have an inhibit (INH) input terminal to disable
all the switches when high. For operation as a digital
multiplexer/demultiplexer, VEE is connected to
GND.
PIN CONNECTION (top view)
HC4051
HC4052
HC4053
October 1993
1/15

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