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HC257 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 HC257
部品説明 Quad 2-Input Data Selector/Multiplexer with 3-State Outputs
メーカ System Logic Semiconductor
ロゴ System Logic Semiconductor ロゴ 



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HC257 Datasheet, HC257 PDF,ピン配置, 機能
SL74HC257
Quad 2-Input Data Selector/Multiplexer
with 3-State Outputs
High-Performance Silicon-Gate CMOS
The SL74HC257 is identical in pinout to the LS/ALS257. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device selects a (4-bit) nibble from either the A or B inputs as
determined by the Select input. The nibble is presented at the outputs
in noninverted from when the Output Enable pin is at a low level. A
high level on the Output Enable pin switches the outputs into the high-
impedance state.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 µA
High Noise Immunity Characteristic of CMOS Devices
LOGIC DIAGRAM
ORDERING INFORMATION
SL74HC257N Plastic
SL74HC257D SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
PIN 16 =VCC
PIN 8 = GND
SLS
System Logic
Semiconductor
FUNCTION TABLE
Inputs
Outputs
Output
Enable
Select
Y0-Y3
H XZ
L L A0-A3
L H B0-B3
X=don’t care
Z = high-impedance state
A0-A3,B0-B3=the levels of the respective
Nibble Inputs

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