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MX25L3208D の電気的特性と機能

MX25L3208DのメーカーはMACRONIXです、この部品の機能は「FLASH MEMORY」です。


製品の詳細 ( Datasheet PDF )

部品番号 MX25L3208D
部品説明 FLASH MEMORY
メーカ MACRONIX
ロゴ MACRONIX ロゴ 




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MX25L3208D Datasheet, MX25L3208D PDF,ピン配置, 機能
MX25L1608D
MX25L3208D
MX25L6408D
FEATURES
16M-BIT [x 1 / x 2] CMOS SERIAL FLASH
32M-BIT [x 1 / x 2] CMOS SERIAL FLASH
64M-BIT [x 1 / x 2] CMOS SERIAL FLASH
GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits (two I/O read mode) structure
32M:33,554,432 x 1 bit structure or 16,772,216 x 2 bits (two I/O read mode) structure
64M:67,108,864 x 1 bit structure or 33,554,432 x 2 bits (two I/O read mode) structure
• 512 Equal Sectors with 4K byte each (16Mb)
1024 Equal Sectors with 4K byte each (32Mb)
2048 Equal Sectors with 4K byte each (64Mb)
- Any Sector can be erased individually
• 32 Equal Blocks with 64K byte each (16Mb)
64 Equal Blocks with 64K byte each (32Mb)
128 Equal Blocks with 64K byte each (64Mb)
- Any Block can be erased individually
• Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
PERFORMANCE
• High Performance
- Fast access time: 86MHz serial clock
- Serial clock of two I/O read mode : 50MHz, which is equivalent to 100MHz
- Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)
- Byte program time: 9us (typical)
- Continuously program mode (automatically increase address under word program mode)
- Fast erase time: 60ms(typ.) /sector (4K-byte per sector) ; 0.7s(typ.) /block (64K-byte per block); 14s(typ.) /chip
for 16Mb, 25s(typ.) for 32Mb, and 50s(typ.) for 64Mb
• Low Power Consumption
- Low active read current: 25mA(max.) at 86MHz, and 10mA(max.) at 33MHz
- Low active programming current: 20mA (max.)
- Low active erase current: 20mA (max.)
- Low standby current: 20uA (max.)
- Deep power-down mode 1uA (typical)
• Typical 100,000 erase/program cycles
• 20 years of data retention
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection
The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instruc-
tions
- Additional 512-bit secured area for unique identifier
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths (Any page to be programed should have page in the erased state first)
P/N: PM1505
1 REV. 1.0, AUG. 28, 2009

1 Page





MX25L3208D pdf, ピン配列
MX25L1608D
MX25L3208D
MX25L6408D
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read
command can be issued to detect completion status of a program or erase operation via WIP bit.
Advanced security features enhance the protection and security functions, please see security features section for
more details.
When the device is not in operation and CS# is high, it is put in standby mode and draws less than 20uA DC cur-
rent.
The MX25L1608D/3208D/6408D utilizes Macronix's proprietary memory cell, which reliably stores memory con-
tents even after typical 100,000 program and erase cycles.
Table 1. Additional Feature Comparison
Additional
Features
Protection and Security
Part
Name
Flexible Block
Protection
(BP0-BP3)
512-bit
Secured Area
MX25L1608D
V
V
MX25L3208D
V
V
MX25L6408D
V
V
Read
Performance
2 I/O Read
(50MHz)
V
V
V
Identifier
Device ID
Device ID
Device ID
RDID
(command: AB (command: 90 (command: EF (command: 9F
hex) hex) hex) hex)
14 (hex)
C2 14 (hex)
(if ADD=0)
C2 14 (hex)
(if ADD=0)
C2 20 15 (hex)
15 (hex)
C2 15 (hex)
(if ADD=0)
C2 15 (hex)
(if ADD=0)
C2 20 16 (hex)
16 (hex)
C2 16 (hex)
(if ADD=0)
C2 16 (hex)
(if ADD=0)
C2 20 17 (hex)
P/N: PM1505
REV. 1.0, AUG. 28, 2009
3


3Pages


MX25L3208D 電子部品, 半導体
MX25L1608D
MX25L3208D
MX25L6408D
DATA PROTECTION
The MX25L1608D/3208D/6408D is designed to offer protection against accidental erasure or programming caused
by spurious system level signals that may exist during power transition. During power up the device automatically
resets the state machine in the standby mode. In addition, with its control register architecture, alteration of the
memory contents only occurs after successful completion of specific command sequences. The device also incor-
porates several features to prevent inadvertent write cycles resulting from VCC power-up and power-down transi-
tion or system noise.
• Valid command length checking: The command length will be checked whether it is at byte base and completed
on byte boundary.
• Write Enable (WREN) command: WREN command is required to set the Write Enable Latch bit (WEL) before
other command to change data. The WEL bit will return to reset stage under following situation:
- Power-up
- Write Disable (WRDI) command completion
- Write Status Register (WRSR) command completion
- Page Program (PP) command completion
- Continuously Program mode (CP) instruction completion
- Sector Erase (SE) command completion
- Block Erase (BE) command completion
- Chip Erase (CE) command completion
• Deep Power Down Mode: By entering deep power down mode, the flash device also is under protected from
writing all commands except Release from deep power down mode command (RDP) and Read Electronic Sig-
nature command (RES).
• Advanced Security Features: there are some protection and securuity features which protect content from inad-
vertent write and hostile access.
I. Block lock protection
- The Software Protected Mode (SPM) use (BP3, BP2, BP1, BP0) bits to allow part of memory to be protected
as read only. The proected area definition is shown as table of "Protected Area Sizes", the protected areas are
more flexible which may protect various area by setting value of BP0-BP3 bits.
Please refer to table of "protected area sizes".
- The Hardware Proteced Mode (HPM) use WP#/ACC to protect the (BP3, BP2, BP1, BP0) bits and SRWD bit.
P/N: PM1505
REV. 1.0, AUG. 28, 2009
6

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
MX25L3208D

FLASH MEMORY

MACRONIX
MACRONIX
MX25L3208E

32M-BIT [x 1 / x 2] CMOS SERIAL FLASH

MACRONIX
MACRONIX


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