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PDF SAM9X35 Data sheet ( Hoja de datos )

Número de pieza SAM9X35
Descripción SMART ARM-based Embedded MPU
Fabricantes ATMEL Corporation　
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SAM9X35
Atmel | SMART ARM-based Embedded MPU
DATASHEET
Description
The SAM9X35 is a member of the Atmel® | SMART series of 400 MHz
ARM926EJ-S™ embedded microprocessor units. This MPU features an
extensive peripheral set and high bandwidth architecture for industrial
applications that require refined user interfaces and high-speed communication.
The SAM9X35 features a graphics LCD controller with 4-layer overlay and 2D
acceleration (picture-in-picture, alpha-blending, scaling, rotation, color
conversion), and a 10-bit ADC that supports 4-wire or 5-wire resistive touchscreen
panels. Networking/connectivity peripherals include two 2.0A/B compatible
Controller Area Network (CAN) interfaces and an IEEE Std 802.3-compatible
10/100 Mbps Ethernet MAC. Multiple communication interfaces include a soft
modem supporting exclusively the Conexant SmartDAA line driver, HS USB
Device and Host, FS USB Host, two HS SDCard/SDIO/MMC interfaces, USARTs,
SPIs, I2S, TWIs and 10-bit ADC.
The 10-layer bus matrix associated with 2 x 8 central DMA channels as well as
dedicated DMAs to support the high-speed connectivity peripherals ensure
uninterrupted data transfer with minimum processor overhead.
The External Bus Interface incorporates controllers for 4-bank and 8-bank
DDR2/LPDDR, SDRAM/LPSDRAM, static memories, as well as specific circuitry
for MLC/SLC NAND Flash with integrated ECC up to 24 bits.
The SAM9X35 is available in a 217-ball BGA package with 0.8 mm ball pitch.
Atmel-11055F-ATARM-SAM9X35-Datasheet_31-Aug-15

1 page




SAM9X35 pdf
Table 2-1. Signal Description List (Continued)
Signal Name
Function
Type
External Bus Interface - EBI
D0–D15
Data Bus
I/O
D16–D31
Data Bus
I/O
A0–A25
Address Bus
Output
NWAIT
External Wait Signal
Input
Static Memory Controller - SMC
NCS0–NCS5
Chip Select Lines
Output
NWR0–NWR3
Write Signal
Output
NRD
Read Signal
Output
NWE
Write Enable
Output
NBS0–NBS3
Byte Mask Signal
Output
NAND Flash Support
NFD0–NFD16
NAND Flash I/O
I/O
NANDCS
NAND Flash Chip Select
Output
NANDOE
NAND Flash Output Enable
Output
NANDWE
NAND Flash Write Enable
Output
DDR2/SDRAM/LPDDR Controller
SDCK,#SDCK
DDR2/SDRAM Differential Clock
Output
SDCKE
DDR2/SDRAM Clock Enable
Output
SDCS
DDR2/SDRAM Controller Chip Select
Output
BA[0..2]
Bank Select
Output
SDWE
DDR2/SDRAM Write Enable
Output
RAS-CAS
Row and Column Signal
Output
SDA10
SDRAM Address 10 Line
Output
DQS[0..1]
Data Strobe
I/O
DQM[0..3]
Write Data Mask
Output
High Speed MultiMedia Card Interface - HSMCI0–1
MCI0_CK, MCI1_CK
Multimedia Card Clock
I/O
MCI0_CDA, MCI1_CDA
Multimedia Card Slot Command
I/O
MCI0_DA0–MCI0_DA3
Multimedia Card 0 Slot A Data
I/O
MCI1_DA0–MCI1_DA3
Multimedia Card 1 Slot A Data
I/O
Universal Synchronous Asynchronous Receiver Transmitter - USARTx
SCKx
USARTx Serial Clock
I/O
TXDx
USARTx Transmit Data
Output
RXDx
USARTx Receive Data
Input
RTSx
USARTx Request To Send
Output
CTSx
USARTx Clear To Send
Input
Active Level
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
Low
Low
Low
Low
SAM9X35 [DATASHEET]
Atmel-11055F-ATARM-SAM9X35-Datasheet_31-Aug-15
5

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SAM9X35 arduino
3.3 217-ball BGA Package Pinout
Table 3-3.
Pin Description BGA217
Primary
Ball Power Rail I/O Type
L3 VDDIOP0
GPIO
P1 VDDIOP0
GPIO
L4 VDDIOP0
GPIO
N4 VDDIOP0
GPIO
T3 VDDIOP0
GPIO
R1 VDDIOP0
GPIO
R4 VDDIOP0
GPIO
R3 VDDIOP0
GPIO
P4 VDDIOP0
GPIO
U3 VDDIOP0
GPIO
T1 VDDIOP0
GPIO
U1 VDDIOP0
GPIO
T2 VDDIOP0
GPIO
T4 VDDIOP0 GPIO_CLK
U2 VDDIOP0
GPIO
U4 VDDIOP0
GPIO
P5 VDDIOP0 GPIO
R5 VDDIOP0 GPIO_CLK
U5 VDDIOP0
GPIO
T5 VDDIOP0
GPIO
U6 VDDIOP0 GPIO
T6 VDDIOP0
GPIO
R6 VDDIOP0 GPIO
U7 VDDIOP0 GPIO_CLK
T7 VDDIOP0
GPIO
T8 VDDIOP0 GPIO
R7 VDDIOP0 GPIO
P8 VDDIOP0 GPIO
U8 VDDIOP0 GPIO
R9 VDDIOP0 GPIO
R8 VDDIOP0 GPIO
U9 VDDIOP0 GPIO
D3 VDDANA
GPIO
D4 VDDANA
GPIO
D2 VDDANA
GPIO
E4 VDDANA
GPIO
Signal
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PB0
PB1
PB2
PB3
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Alternate
PIO Peripheral A PIO Peripheral B PIO Peripheral C Reset State
Signal, Dir,
Signal Dir Signal Dir Signal Dir Signal Dir PU, PD, ST
TXD0
O SPI1_NPCS1 O
PIO, I, PU, ST
RXD0
I SPI0_NPCS2 O
PIO, I, PU, ST
RTS0
O MCI1_DA1 I/O
ETX0
O PIO, I, PU, ST
CTS0
I MCI1_DA2 I/O
ETX1
O PIO, I, PU, ST
SCK0
I/O MCI1_DA3 I/O
PIO, I, PU, ST
TXD1
O CANTX1 O
PIO, I, PU, ST
RXD1
I CANRX1 I
PIO, I, PU, ST
TXD2
O SPI0_NPCS1 O
PIO, I, PU, ST
RXD2
I SPI1_NPCS0 I/O
PIO, I, PU, ST
DRXD
I CANRX0 I
PIO, I, PU, ST
DTXD
O CANTX0 O
PIO, I, PU, ST
SPI0_MISO I/O MCI1_DA0 I/O
PIO, I, PU, ST
SPI0_MOSI I/O MCI1_CDA I/O
PIO, I, PU, ST
SPI0_SPCK I/O MCI1_CK I/O
PIO, I, PU, ST
SPI0_NPCS0 I/O
PIO, I, PU, ST
MCI0_DA0 I/O
PIO, I, PU, ST
MCI0_CDA I/O
PIO, I, PU, ST
MCI0_CK I/O
PIO, I, PU, ST
MCI0_DA1 I/O
PIO, I, PU, ST
MCI0_DA2 I/O
PIO, I, PU, ST
MCI0_DA3 I/O
PIO, I, PU, ST
TIOA0 I/O SPI1_MISO I/O
PIO, I, PU, ST
TIOA1 I/O SPI1_MOSI I/O
PIO, I, PU, ST
TIOA2 I/O SPI1_SPCK I/O
PIO, I, PU, ST
TCLK0
I
TK I/O
PIO, I, PU, ST
TCLK1
I
TF I/O
PIO, I, PU, ST
TCLK2
I
TD O
PIO, I, PU, ST
TIOB0 I/O
RD
I
PIO, I, PU, ST
TIOB1 I/O RK I/O
PIO, I, PU, ST
TIOB2 I/O RF I/O
PIO, I, PU, ST
TWD0
I/O SPI1_NPCS3 O
EMDC
O PIO, I, PU, ST
TWCK0
O SPI1_NPCS2 O
ETXEN
O PIO, I, PU, ST
ERX0
I
RTS2
O
PIO, I, PU, ST
ERX1 I CTS2 I
PIO, I, PU, ST
ERXER
I
SCK2
I/O
PIO, I, PU, ST
ERXDV
I SPI0_NPCS3 O
PIO, I, PU, ST
SAM9X35 [DATASHEET]
Atmel-11055F-ATARM-SAM9X35-Datasheet_31-Aug-15
11

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