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PDF A024CN02-VJ Data sheet ( Hoja de datos )
| Número de pieza | A024CN02-VJ | |
| Descripción | LCD Module | |
| Fabricantes | AUO | |
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Doc. version : 0.1
Tota l pa g es : 5 6
Date
: 2007/02/13
Product Specification
2.36〞 COLOR TFT-LCD MODULE
MODEL NAME: A024CN02 VJ
< ◆ > Preliminary Specification
< > Final Specification
Note: The content of this
specification is subject to
change.
© 2006 AU Optronics
All Rights Reserved,
Do Not Copy.
ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PRPER SHALL NOT BE REPRODUCED, COPIED,
OR TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.
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A. Physical specifications
NO. Item
Specification
1 Display resolution (dot)
480(W)×234(H)
2 Active area (mm)
3 Screen size (inch)
4 Dot pitch (mm)
5 Color configuration
48.0 (W) × 35.685 (H)
2.36 (Diagonal)
0.10 (W) × 0.1525 (H)
R. G. B. delta
6 Overall dimension (mm)
55.2(W) × 47.55(H) × 2.9(D)
7 Weight (g)
TBD
8 Panel surface treatment
AG,Hard coating
Note 1: Refer to Page 43 Fig.1(General tolerance is ±0.3mm)
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Remark
Note1
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b. UPS051 Timing conditions
Parameter
DCLK Frequency
Period
Display period
HSYNC
Back porch
Front porch
Symbol
1/tDCLK
tH
thdisp
thbp
thfp
Min.
8
580
84
0
Pulse width
thsw 1
Period
Odd
tV Note 4
Even
Odd
Display period
Even
tvdisp
VSYNC
Back porch
Front porch
Pulse width
Odd
Even
Odd
Even
Odd
Even
tvbp
tvfp
tvsw
11
10.5
0
0
1
Data set-up time
tds 12
Data hold time
tdh 12
Typ.
9.7
616
480
100
36
20
262.5
234
18
17.5
4.5
5
-
Max.
12
649
115
-
50
Note 4
24
23.5
-
-
-
Unit.
MHz
DCLK
DCLK
DCLK
DCLK
DCLK
tH
Remark
Note 1
tH
tH Note 2, 3, 5, 6
tH
DCLK
ns
ns
Note 1: UPS051 Horizontal back porch time (thbp) is adjustable by setting register DDL; requirement of
minimum back porch time and minimum front porch time must be satisfied.
Note 2: UPS051 Vertical back porch time (tvbp) is adjustable by setting register HDL; requirement of
minimum back porch time and minimum front porch time must be satisfied.
Note 3: Both interlace and non-interlace mode can be accepted.
Note 4: The min and max value of VSYNC period is related to Hsync period and Vs back porch.
Note 5: This chip support both interlace & non-interlace mode.
Note 6: Please keep frame over 50 Hz to get the better display quality.
ALL RIGHTS STRICTLY RESERVED. ANY PORTION OF THIS PRPER SHALL NOT BE REPRODUCED, COPIED,
OR TRANSFORMED TO ANY OTHER FORMS WITHOUT PERMISSION FROM AU OPTRONICS CORP.
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| PDF Descargar | [ Datasheet A024CN02-VJ.PDF ] | |
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