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HCTS540DMSR の電気的特性と機能

HCTS540DMSRのメーカーはIntersil Corporationです、この部品の機能は「Radiation Hardened Inverting Octal Buffer/Line Driver/ Three-State」です。


製品の詳細 ( Datasheet PDF )

部品番号 HCTS540DMSR
部品説明 Radiation Hardened Inverting Octal Buffer/Line Driver/ Three-State
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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HCTS540DMSR Datasheet, HCTS540DMSR PDF,ピン配置, 機能
HCTS540MS
September 1995
Radiation Hardened
Inverting Octal Buffer/Line Driver, Three-State
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Bus Driver Outputs 15 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20, LEAD FINISH C
TOP VIEW
OE1 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
20 VCC
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii 5µA at VOL, VOH
Description
The Intersil HCTS540MS is a Radiation Hardened inverting
Octal Buffer/Line Driver, with two active-low output enables.
The output enable pins (OE1 and OE2) control the three-
state outputs. If either enable is high the outputs will be in
the high impedance state. For data output both enables
(OE1 and OE2) must be low.
The HCTS540MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20, LEAD FINISH C
TOP VIEW
OE1
A0
A1
A2
A3
A4
A5
A6
A7
GND
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VCC
OE2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
The HCTS540MS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
HCTS540DMSR
HCTS540KMSR
HCTS540D/Sample
HCTS540K/Sample
HCTS540HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
Spec Number 518631
File Number 2232.2

1 Page





HCTS540DMSR pdf, ピン配列
Specifications HCTS540MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA θJC
SBDIP Package. . . . . . . . . . . . . . . . . . . . 72oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 107oC/W 28oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . 500ns Max.
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
PARAMETER
Quiescent Current
Output Current
(Sink)
Output Current
(Source)
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
SYMBOL
(NOTE 1)
CONDITIONS
ICC VCC = 5.5V,
VIN = VCC or GND
IOL VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
IOH VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V
GROUP
A SUB-
GROUPS
1
2, 3
1
2, 3
1
2, 3
TEMPERATURE
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
LIMITS
MIN MAX UNITS
- 40 µA
- 750 µA
7.2 - mA
6.0 - mA
-7.2 - mA
-6.0 - mA
Output Voltage Low
Output Voltage High
Input Leakage
Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
VOL
VOH
IIN
IOZ
FN
VCC = 4.5V, VIH = 2.25V,
IOL = 50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
VCC = 5.5V, VIN = VCC or
GND
VCC = 5.5V, Applied Volt-
age = 0V or VCC
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1
2, 3
1
2, 3
7, 8A, 8B
+25oC, +125oC, -55oC
+25oC, +125oC, -55oC
+25oC, +125oC, -55oC
+25oC, +125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC, +125oC, -55oC
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
-
-
VCC
-0.1
VCC
-0.1
-
-
-
-
-
0.1
0.1
-
-
±0.5
±5.0
±1
±50
-
V
V
V
V
µA
µA
µA
µA
-
Spec Number 518631
3


3Pages


HCTS540DMSR 電子部品, 半導体
Specifications HCTS540MS
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE
GROUPS
METHOD
TEST
PRE RAD
POST RAD
Group E Subgroup 2
5005
1, 7, 9
Table 4
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
READ AND RECORD
PRE RAD
POST RAD
1, 9 Table 4 (Note 1)
TABLE 8. STATIC BURN-IN AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
11 - 18
1 - 10, 19
-
20 - -
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
11 - 18
10
-
1 - 9, 19, 20
-
-
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
- 10
11 - 18
20
1, 19
2-9
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ ± 5% for static burn-in.
2. Each pin except VCC and GND will have a resistor of 680Ω ± 5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
11 - 18
10
1 - 9, 19, 20
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 518631
6

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部品番号部品説明メーカ
HCTS540DMSR

Radiation Hardened Inverting Octal Buffer/Line Driver/ Three-State

Intersil Corporation
Intersil Corporation


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