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HD6433826 の電気的特性と機能

HD6433826のメーカーはRenesas Technologyです、この部品の機能は「single-chip microcomputers」です。


製品の詳細 ( Datasheet PDF )

部品番号 HD6433826
部品説明 single-chip microcomputers
メーカ Renesas Technology
ロゴ Renesas Technology ロゴ 




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HD6433826 Datasheet, HD6433826 PDF,ピン配置, 機能
H8/3867 Series
H8/3867
H8/3866
H8/3865
H8/3864
H8/3863
H8/3862
HD6473867, HD6433867
HD6433866
HD6433865
HD6433864
HD6433863
HD6433862
H8/3827 Series
H8/3827
H8/3826
H8/3825
H8/3824
H8/3823
H8/3822
HD6473827, HD6433827
HD6433826
HD6433825
HD6433824
HD6433823
HD6433822
Hardware Manual
ADE-602-142B
Rev. 3
3/15/03
Hitachi Ltd.
The revision list can be viewed directly by
clicking the title page.
The revision list summarizes the locations of
revisions and additions. Details should always
be checked by referring to the relevant text.

1 Page





HD6433826 pdf, ピン配列
List of Items Revised or Added for This Version
Page
1
2
3
5
8
13
88
89
91
92
95
97
99
100
102
104
107
109
147
226
248
251
Item
Description
Table 1.1 Features / CPU
Change in (2) High-speed calculation
specification
Table 1.1 Features / Clock pulse
generators
Change in specification
Table 1.1 Features / LCD drive power
supply
Addition
Figure 1.1 Block Diagram
Modification
Table 1.2 Pin Functions / Power source pin Modification of stabilization capacitance
2.1.1 Features
Change in High-speed operation
Figure 4.2 Typical Connection to Crystal Addition of recommended value
Oscillator
Figure 4.4 Typical Connection to Ceramic Addition of recommended value
Oscillator
Figure 4.7 Typical Connection to 32.768- Addition of description
kHz/38.4 kHz Crystal Oscillator (Subclock)
Figure 4.9 Pin Connection when not Using Modification
Subclock
Table 5.1 Operating Modes
Modification of subsleep mode/watch mode
descriptions
Table 5.2 Internal State in Each Operating Modification of Note 4
Mode
5.1.1 System Control Registers
1. System control register 1 (SYSCR1)
Addition of Notes to Bits 6 to 4
2. System control register 2 (SYSCR2) Modification of Bit 4 contents
5.2 Sleep Mode
Addition of description
5.3.3 Oscillator Settling Timer after Stanby Addition of description
Mode is Cleared
5.5.2 Clearing Subsleep Mode
Addition of description
Clearing by interrupt
5.7.1 Transition to Active (Medium-Speed) Addition of description
Mode
Table 8.10 Port 3 Pin States
Modification
Table 9.13 Timer G Operation Modes
Addition of description in Notes
9.7.5 Application Notes
Addition and modification of descriptions
Figure 10.1 SCI3 Block Diagram
Modification


3Pages


HD6433826 電子部品, 半導体
Contents
Section 1 Overview..........................................................................................
1.1 Overview............................................................................................................................
1.2 Internal Block Diagram .....................................................................................................
1.3 Pin Arrangement and Functions ........................................................................................
1.3.1 Pin Arrangement ..................................................................................................
1.3.2 Pin Functions........................................................................................................
1
1
6
7
7
9
Section 2 CPU.................................................................................................. 13
2.1 Overview............................................................................................................................ 13
2.1.1 Features ................................................................................................................ 13
2.1.2 Address Space ...................................................................................................... 14
2.1.3 Register Configuration ......................................................................................... 14
2.2 Register Descriptions......................................................................................................... 15
2.2.1 General Registers.................................................................................................. 15
2.2.2 Control Registers.................................................................................................. 15
2.2.3 Initial Register Values .......................................................................................... 16
2.3 Data Formats...................................................................................................................... 17
2.3.1 Data Formats in General Registers....................................................................... 18
2.3.2 Memory Data Formats.......................................................................................... 19
2.4 Addressing Modes ............................................................................................................. 20
2.4.1 Addressing Modes................................................................................................ 20
2.4.2 Effective Address Calculation.............................................................................. 22
2.5 Instruction Set.................................................................................................................... 26
2.5.1 Data Transfer Instructions .................................................................................... 28
2.5.2 Arithmetic Operations .......................................................................................... 30
2.5.3 Logic Operations .................................................................................................. 31
2.5.4 Shift Operations.................................................................................................... 31
2.5.5 Bit Manipulations ................................................................................................. 33
2.5.6 Branching Instructions.......................................................................................... 37
2.5.7 System Control Instructions ................................................................................. 39
2.5.8 Block Data Transfer Instruction ........................................................................... 40
2.6 Basic Operational Timing.................................................................................................. 42
2.6.1 Access to On-Chip Memory (RAM, ROM) ......................................................... 42
2.6.2 Access to On-Chip Peripheral Modules ............................................................... 43
2.7 CPU States ......................................................................................................................... 45
2.7.1 Overview .............................................................................................................. 45
2.7.2 Program Execution State ...................................................................................... 46
2.7.3 Program Halt State................................................................................................ 46
2.7.4 Exception-Handling State .................................................................................... 46
ii

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
HD6433822

single-chip microcomputers

Renesas Technology
Renesas Technology
HD6433823

single-chip microcomputers

Renesas Technology
Renesas Technology
HD6433824

single-chip microcomputers

Renesas Technology
Renesas Technology
HD6433825

single-chip microcomputers

Renesas Technology
Renesas Technology


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